Towards a new standard for system-level design

ABSTRACT

Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50-90 percent of the functionality. The exchange of system-level intellectual property (IP) models for creating executable specifications has become a key strategic element for efficient system-to-silicon design flows. Because C and C++ are the dominant languages used by chip architects, systems engineers and software engineers today, we believe that a C-based approach to hardware modeling is necessary. This will enable co-design, providing a more natural solution to partitioning functionality between hardware and software. In this paper we present the design of SystemC, a C++ class library that provides the necessary features for modeling design hierarchy, concurrency, and reactivity in hardware. We will also describe experiences of using SystemC 1) for the co-verification of 8051 processor with a bus-functional model and 2) for the modeling and simulation of an MPEG-2 video decoder.

REFERENCES

• 1: Open SystemC Initiative. See http://www, systemc, org.
• 2: G. Berry. Real-time programming: General purpose or special-purpose languages. In G. Ritter, editor, Information Processing 89, pages 11-17. Elsevier Science Publishers B.V. (North Holland), 1989.
• 3: Gérard Berry, Preemption in Concurrent Systems, Proceedings of the 13th Conference on Foundations of Software Technology and Theoretical Computer Science, p.72-93, December 15-17, 1993
• 4: Rolf Ernst , Jorg Henkel , Thomas Benner, Hardware-Software Cosynthesis for Microcontrollers, IEEE Design & Test, v.10 n.4, p.64-75, October 1993 [doi>10.1109/54.245964]
• 5: F. Balarin et al. Polis: A Design Environment for Control-Dominated Embedded Systems. See http://wwwcad. eecs. berkeley, edu/R espep/R esearch/hs c/abstract, h tml.
• 6: Rajesh K. Gupta , Giovanni De Micheli, A co-synthesis approach to embedded system design automation, Design Automation for Embedded Systems, v.1 n.1-2, p.69-120, Jan. 1996 [doi>10.1007/BF00134684]
• 7: Stan Liao , Steve Tjiang , Rajesh Gupta, An efficient implementation of reactivity for modeling hardware in the scenic design environment, Proceedings of the 34th annual conference on Design automation, p.70-75, June 09-13, 1997, Anaheim, California, United States [doi>10.1145/266021.266037]
• 8: Mentor Graphics Corp. Seamless Co-Verification. See h ttp : //www. me n to rgra h ic s. c o m/s ea m less.
• 9: Steven S. Muchnick, Advanced compiler design and implementation, Morgan Kaufmann Publishers Inc., San Francisco, CA, 1998
• 10: Luc Séméria , Abhijit Ghosh, Methodology for hardware/software co-verification in C/C++ (short paper), Proceedings of the 2000 conference on Asia South Pacific design automation, p.405-408, January 2000, Yokohama, Japan [doi>10.1145/368434.368712]
• 11: Synopsys, Inc. DesignWare DW8051 Macrocell Solution. h ttp : //www. synopsys, c o m/p ro ducts/desi gn ware/8 0 51_ds. h tml.
• 12: Synopsys, Inc. Eagle Tools. See http://www, synopsys, com/ eagle.
• 13: Markus Willems , Volker Bürsgens , Holger Keding , Thorsten Grötker , Heinrich Meyr, System level fixed-point design based on an interpolative approach, Proceedings of the 34th annual conference on Design automation, p.293-298, June 09-13, 1997, Anaheim, California, United States [doi>10.1145/266021.266105]
• 14: W. Wolf. Hardware-Software Co-design of Embedded Systems. IEEE Proceedings, 82(7):965-989, July 1994.

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES

General Terms:
Standardization, Theory