Prediction of interconnect fan-out distribution using Rent's rule

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Prediction of interconnect fan-out distribution using Rent's rule

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International Workshop on System-Level Interconnect Prediction archive
Proceedings of the 2000 international workshop on System-level interconnect prediction table of contents

San Diego, California, United States

Pages: 107 - 112

Year of Publication: 2000

ISBN:1-58113-249-2

Authors

Payman Zarkesh-Ha	Georgia Institute of Technology, 791 Atlantic Drive N.W., Atlanta, GA
Jeffrey A. Davis	Georgia Institute of Technology, 791 Atlantic Drive N.W., Atlanta, GA
William Loh	LSI Logic Corporation, 1551 McCarthy Boulevard, Milpitas, CA
James D. Meindl	Georgia Institute of Technology, 791 Atlantic Drive N.W., Atlanta, GA

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

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ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 25, Citation Count: 10

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	J. A. Davis, V. K. De and J. D. Meindl, "A stochastic wire-length distribution for gigascale integration (GSI): Part II: applications to clock frequency, power dissipation, and chip size estimation," IEEE Transaction on Electron Devices, Vol. 45, No. 3, pp. 590-597, March 1998.
	2	J. A. Davis, V. K. De and J. D. Meindl, "A stochastic wire-length distribution for gigascale integration (GSI): Part I: Derivation and validation," IEEE Transaction on Electron Devices, Vol. 45, No. 3, pp. 580-589, March 1998.
	3	P. Zarkesh-Ha and J.D. Meindl, "Stochastic net length distribution for global interconnects in a heterogeneous system-on-a-chip," IEEE Symposium on VLSI Technology, pp. 44-45, June 1998.
	4	B. S. Landman, R. L. Russo, "On a pin versus block relationship for partitions of logic graphs," IEEE Transaction on Computers, Vol. C-20, pp. 1469-1479, Dec. 1971.
	5	D. Stroobandt, "A priori wire length estimation based on Rent's rule," The 1 st International Workshop on System-Level Interconnect Prediction, April 1999.
	6	Dirk Stroobandt , Fadi J. Kurdahi, On the Characterization of Multi-Point Nets in Electronic Designs, Proceedings of the Great Lakes Symposium on VLSI '98, p.344, February 19-24, 1998
	7	P. Zarkesh-Ha, J.A. Davis, W. Loh, and J.D. Meindl, "On a pin versus gate relationship for heterogeneous systems: Heterogeneous Rent's rule," IEEE Custom Integrated Circuit Conference, pp. 93-96, May 1998.
	8	P. Zarkesh-Ha, J.A. Davis, W. Loh, and J.D. Meindl, "Stochastic interconnect network fan-out distribution using Rent's rule," IEEE International Interconnect Technology Conference, pp. 184-186, June 1998.

CITED BY 10

	Chung-Kuan Cheng , Andrew B. Kahng , Bao Liu, Interconnect implications of growth-based structural models for VLSI circuits, Proceedings of the 2001 international workshop on System-level interconnect prediction, p.99-106, March 31-April 01, 2001, Sonoma, California, United States
	Tao Wan , Malgorzata Chrzanowska-Jeske, Prediction of interconnect net-degree distribution based on Rent's rule, Proceedings of the 2004 international workshop on System level interconnect prediction, February 14-15, 2004, Paris, France
	Payman Zarkesh-Ha , Ken Doniger , William Loh , Peter Bendix, Prediction of interconnect adjacency distribution: derivation, validation, and applications, Proceedings of the 2004 international workshop on System level interconnect prediction, February 14-15, 2004, Paris, France
	Xiaojian Yang , Elaheh Bozorgzadeh , Majid Sarrafzadeh, Wirelength estimation based on rent exponents of partitioning and placement, Proceedings of the 2001 international workshop on System-level interconnect prediction, p.25-31, March 31-April 01, 2001, Sonoma, California, United States
	James W. Joyner , Payman Zarkesh-Ha , James D. Meindl, Global interconnect design in a three-dimensional system-on-a-chip, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.4, p.367-372, April 2004
	Dirk Stroobandt, A priori wire length distribution models with multiterminal nets, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.1, p.35-43, February 2003
	M. Y. Lanzerotti , G. Fiorenza , R. A. Rand, Microminiature packaging and integrated circuitry: the work of E. F. Rent, with an application to on-chip interconnection requirements, IBM Journal of Research and Development, v.49 n.4/5, p.777-803, July 2005
	S. C. Goldstein, The impact of the nanoscale on computing systems, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.655-661, November 06-10, 2005, San Jose, CA
	Alastair M. Smith , Steven J.E. Wilton , Joydip Das, Wirelength modeling for homogeneous and heterogeneous FPGA architectural development, Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays, February 22-24, 2009, Monterey, California, USA
	Tao Wan , Malgorzata Chrzanowska-Jeske, A novel net-degree distribution model and its application to floorplanning benchmark generation, Integration, the VLSI Journal, v.40 n.4, p.420-433, July, 2007