Efficient representation of interconnection length distributions using generating polynomials

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Efficient representation of interconnection length distributions using generating polynomials

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International Workshop on System-Level Interconnect Prediction archive
Proceedings of the 2000 international workshop on System-level interconnect prediction table of contents

San Diego, California, United States

Pages: 99 - 105

Year of Publication: 2000

ISBN:1-58113-249-2

Authors

Dirk Stroobandt	ELIS Department, Ghent University, Sint-Pietersnieuwstraat 41, B-9000 Gent, Belgium
Herwig Van Marck	Centre for Evolvable Language Engineering, Flanders Language Valley, St.-Krispijnstraat 7, B-8700 leper, Belgium

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

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ACM New York, NY, USA

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Downloads (6 Weeks): 0, Downloads (12 Months): 8, Citation Count: 11

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	2	Andrew E. Caldwell , Yu Cao , Andrew B. Kahng , Farinaz Koushanfar , Hua Lu , Igor L. Markov , Michael Oliver , Dirk Stroobandt , Dennis Sylvester, GTX: the MARCO GSRC technology extrapolation system, Proceedings of the 37th conference on Design automation, p.693-698, June 05-09, 2000, Los Angeles, California, United States [doi>10.1145/337292.337617]
	3	Philip Christie , Dirk Stroobandt, The interpretation and application of Rent's rule, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.8 n.6, p.639-648, Dec. 2000 [doi>10.1109/92.902258]
	4	J. A. Davis, V. K. De, and J. D. Meindl. A stochastic wire-length distribution for gigascale integration (GSI) { PART I: Derivation and validation. IEEE Trans. on Electron Devices, 45 (3): pages 580{589, March 1998.
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	12	D. Stroobandt. Analytical methods for a priori wire length estimates in computer systems, 1998. Ph.D. thesis (translated from Dutch), Ghent University.
	13	D. Stroobandt. Tutorial: A priori wire length estimates based on Rent's rule. In Workshop on System- Level Interconnect Prediction, pages 3{50, 1999.
	14	D. Stroobandt and J. Van Campenhout. Estimating interconnection lengths in three-dimensional computer systems. IEICE Trans. on Inf. & Syst., Special Issue on Synthesis and Veri~cation of Hardware Design, vol. E80{D (no. 10): pages 1024{1031, October 1997.
	15	D. Stroobandt and J. Van Campenhout. Accurate interconnection length estimations for predictions early in the design cycle. VLSI Design, Special Issue on Physical Design in Deep Submicron, vol. 10, 1999.
	16	D. Stroobandt, H. Van Marck, and J. Van Campenhout. On the use of generating polynomials for the representation of interconnection length distributions. In Proc. 4th Intl. Workshop on Symbolic Methods and Applications in Circuit Design (SMACD '96), pages 70{73. Katholieke Universiteit Leuven, October 1996.
	17	D. Stroobandt, H. Van Marck, and J. Van Campenhout. Estimating logic cell to I/O pad lengths in computer systems. In Proc. Workshop on Synthesis and System Integration of Mixed Technologies, pages 192{198. S. Insatsu, Osaka, Japan, December 1997.
	18	D. Sylvester and K. Keutzer. System-level performance modeling with BACPAC { Berkeley advanced chip performance calculator. In Workshop on System- Level Interconnect Prediction, pages 109{114, 1999.
	19	J. Van Campenhout, H. Van Marck, J. Depreitere, and J. Dambre. Optoelectronic FPGAs. IEEE Journal of Selected Topics in Quantum Electronics on Smart Photonic Components, Interconnects, and Processing , vol. 5 (no. 2): pages 306{315, March/April 1999.
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CITED BY 11

	J. Dambre , P. Verplaetse , D. Stroobandt , J. Van Campenhout, On rent's rule for rectangular regions, Proceedings of the 2001 international workshop on System-level interconnect prediction, p.49-56, March 31-April 01, 2001, Sonoma, California, United States
	Stephen E. Krufka , Phillip Christie, Terminal optimization analysis for functional block re-use, Proceedings of the 2002 international workshop on System-level interconnect prediction, April 06-07, 2002, San Diego, California, USA
	Chung-Kuan Cheng , Andrew B. Kahng , Bao Liu , Dirk Stroobandt, Toward better wireload models in the presence of obstacles, Proceedings of the 2001 conference on Asia South Pacific design automation, p.527-532, January 2001, Yokohama, Japan
	Joni Dambre , Peter Verplaetse , Dirk Stroobandt , Jan Van Campenhout, A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.1, p.24-34, February 2003
	James W. Joyner , Raguraman Venkatesan , Payman Zarkesh-Ha , Jeffrey A. Davis , James D. Meindl, Impact of three-dimensional architectures on interconnects in gigascale integration, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.6, p.922-928, 12/1/2001
	Chung-Kuan Cheng , Andrew B. Kahng , Bao Liu , Dirk Stroobandt, Toward better wireload models in the presence of obstacles, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.2, p.177-189, April 2002
	Dirk Stroobandt, A priori system-level interconnect prediction: Rent's rule and wire length distribution models, Proceedings of the 2001 international workshop on System-level interconnect prediction, p.3-21, March 31-April 01, 2001, Sonoma, California, United States
	Mandeep Bamal , Evelyn Grossar , Michele Stucchi , Karen Maex, Interconnect width selection for deep submicron designs using the table lookup method, Proceedings of the 2004 international workshop on System level interconnect prediction, February 14-15, 2004, Paris, France
	Dirk Stroobandt, A priori wire length distribution models with multiterminal nets, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.1, p.35-43, February 2003
	A differential equation for placement analysis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.6, p.913-921, 12/1/2001
	Shuhei Amakawa , Takumi Uezono , Takashi Sato , Kenichi Okada , Kazuya Masu, Adaptable wire-length distribution with tunable occupation probability, Proceedings of the 2007 international workshop on System level interconnect prediction, March 17-18, 2007, Austin, Texas, USA