Locality optimizations for multi-level caches

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Locality optimizations for multi-level caches

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Conference on High Performance Networking and Computing archive
Proceedings of the 1999 ACM/IEEE conference on Supercomputing (CDROM) table of contents

Portland, Oregon, United States

Article No. 2

Year of Publication: 1999

ISBN:1-58113-091-0

Authors

Gabriel Rivera	Department of Computer Science, University of Maryland, College Park, MD
Chau-Wen Tseng	Department of Computer Science, University of Maryland, College Park, MD

Sponsors

IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 22, Citation Count: 9

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 9

	Gabriel Rivera , Chau-Wen Tseng, Tiling optimizations for 3D scientific computations, Proceedings of the 2000 ACM/IEEE conference on Supercomputing (CDROM), p.32-es, November 04-10, 2000, Dallas, Texas, United States
	Claudia Leopold, Exploiting non-uniform reuse for cache optimization, Proceedings of the 2001 ACM symposium on Applied computing, p.560-564, March 2001, Las Vegas, Nevada, United States
	Neungsoo Park , Bo Hong , Viktor K. Prasanna, Tiling, Block Data Layout, and Memory Hierarchy Performance, IEEE Transactions on Parallel and Distributed Systems, v.14 n.7, p.640-654, July 2003
	Chung-hsing Hsu , Ulrich Kremer, A Quantitative Analysis of Tile Size Selection Algorithms, The Journal of Supercomputing, v.27 n.3, p.279-294, March 2004
	Xavier Vera , Jaume Abella , Josep Llosa , Antonio González, An accurate cost model for guiding data locality transformations, ACM Transactions on Programming Languages and Systems (TOPLAS), v.27 n.5, p.946-987, September 2005
	Evangelia Athanasaki , Nectarios Koziris, Fast indexing for blocked array layouts to reduce cache misses, International Journal of High Performance Computing and Networking, v.3 n.5/6, p.417-433, March 2005
	Tushar Mohan , Bronis R. de Supinski , Sally A. McKee , Frank Mueller , Andy Yoo , Martin Schulz, Identifying and Exploiting Spatial Regularity in Data Memory References, Proceedings of the 2003 ACM/IEEE conference on Supercomputing, p.49, November 15-21, 2003
	DaeGon Kim , Lakshminarayanan Renganarayanan , Dave Rostron , Sanjay Rajopadhye , Michelle Mills Strout, Multi-level tiling: M for the price of one, Proceedings of the 2007 ACM/IEEE conference on Supercomputing, November 10-16, 2007, Reno, Nevada
	Albert Hartono , Muthu Manikandan Baskaran , Cédric Bastoul , Albert Cohen , Sriram Krishnamoorthy , Boyana Norris , J. Ramanujam , P. Sadayappan, Parametric multi-level tiling of imperfectly nested loops, Proceedings of the 23rd international conference on Supercomputing, June 08-12, 2009, Yorktown Heights, NY, USA