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MCM placement using a realistic thermal model
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Source Great Lakes Symposium on VLSI archive
Proceedings of the 10th Great Lakes symposium on VLSI table of contents
Chicago, Illinois, United States
Pages: 189 - 192  
Year of Publication: 2000
ISBN:1-58113-251-4
Authors
Craig Beebe  University of Arizona, ECE Dept.
Jo Dale Carothers  University of Arizona, ECE Dept.
Alfonso Ortega  University of Arizona, AME Dept., Tucson, Arizona
Sponsors
Northwestern University : Northwestern University
SIGDA: ACM Special Interest Group on Design Automation
IEEE : Institute of Electrical and Electronics Engineers
Publisher
ACM  New York, NY, USA
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ABSTRACT

Typically, placement algorithms attempt to minimize the total net length of a printed circuit board (PCB). However, an MCM's increased throughput and dense circuitry can easily result in failure if the board contains “hot spots”. Therefore, an accurate thermal model of an MCM was needed in the development of a new placement algorithm designed to consider both total net length and thermal constraints. This algorithm uses a combination of simulated evolution and simulated annealing in an iterative approach. Each chip has a maximum thermal tolerance that it can withstand before it is known to fail. The fitness method evaluates the maximum temperature for each chip, considering every chip's thermal dissipation at the chip's hottest point. Results are presented that compare the effects of various parameters.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Craig Beebe: colleagues
Jo Dale Carothers: colleagues
Alfonso Ortega: colleagues