Algorithm analysis and mapping environment for adaptive computing systems (poster abstract)

ABSTRACT

Our team is developing an integrated algorithm analysis and mapping environment for migrating a dataflow representation of a signal processing algorithm into an Adaptive Computing System (ACS) consisting of FPGAs. This environment allows designers to transform signal processing algorithms into FPGA-based hardware faster, by an order of magnitude, than is currently possible. Our approach has been to focus on three areas of capability critical to the success of adaptive computing: algorithm analysis, algorithm mapping, and smart generators. These capabilities are being implemented as extensions to the Ptolemy design environment developed at the University of California, Berkeley (http://ptolemy.cecs.berkeley.edu). Our tools were used to automatically implement a Winograd DFT and a high speed linear FM detector. In both cases, our tools simulated the algorithm, selected appropriate fixed point representations, and generated the VHDL implementations. The final FPGA designs were obtained by synthesizing the VHDL and performing place and route with commercial tools.

INDEX TERMS

Primary Classification:
  A. General Literature

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS

General Terms:
Algorithms, Documentation