CONLOAD—a new lot release rule for semiconductor wafer fabs

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

CONLOAD—a new lot release rule for semiconductor wafer fabs

Full text

Pdf (104 KB)

Source

Winter Simulation Conference archive
Proceedings of the 31st conference on Winter simulation: Simulation---a bridge to the future - Volume 1 table of contents

Phoenix, Arizona, United States

Pages: 850 - 855

Year of Publication: 1999

ISBN:0-7803-5780-9

Author

Oliver Rose

Institute of Computer Science, University of Würzburg, 97074 Würzburg, Germany

Sponsors

ACM: Association for Computing Machinery
SIGSIM: ACM Special Interest Group on Simulation and Modeling

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 13, Citation Count: 4

Additional Information:

references cited by index terms collaborative colleagues

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/324138.324535 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Atherton, L. F. and R. W. Atherton (1995). Wafer Fabri-cation: Factory Performance and Analysis. Boston: Kluwer.
	2	Fowler, J. W., G. L. Hogg, and S. J. Mason (1998). Workload control in the semiconductor industry. Technical report, Arizona State University, IMSE, Tempe, AZ.
	3	Hopp, W. J. and M. L. Spearman (1996). Wafer Fabrication: Factory Performance and Analysis. Chicago: Irwin.
	4	Leonard Kleinrock, Theory, Volume 1, Queueing Systems, Wiley-Interscience, 1975
	5	Lawton, J. W., A. Drake, R. Henderson, L. M. Wein, R. Whit-ney, and D. Zuanich (1990). Workload regulating wafer release in a GaAs fab facility. In Proceedings of the International Semiconductor Manufacturing Sci-ence Symposium, pp. 33-38.
	6	Oliver Rose, WIP evolution of a semiconductor factory after a bottleneck workcenter breakdown, Proceedings of the 30th conference on Winter simulation, p.997-1004, December 13-16, 1998, Washington, D.C., United States
	7	Rose, O. (1999). Estimation of the cycle time distribution of a wafer fab by a simple simulation model. In Proceedings of the SMOMS '99.
	8	Wein, L. M. (1988). Scheduling semiconductor wafer fab-rication. IEEE Transactions on Semiconductor Manu-facturing 1(3), 115-130.

CITED BY 4

	Oliver Rose, General simulation applications in semiconductor manufacturing: why do simple wafer fab models fail in certain scenarios?, Proceedings of the 32nd conference on Winter simulation, December 10-13, 2000, Orlando, Florida
	Lars Mönch, Simulation-based assessment of order release strategies for a distributed shifting bottleneck heuristic, Proceedings of the 37th conference on Winter simulation, December 04-07, 2005, Orlando, Florida
	Dongping Huang , Hessam S. Sarjoughain , Gary W. Godding , Daniel E. Rivera , Karl G. Kempf, Flexible experimentation and analysis for hybrid DEVS and MPC models, Proceedings of the 37th conference on Winter simulation, December 03-06, 2006, Monterey, California
	Oliver Rose, Improved simple simulation models for semiconductor wafer factories, Proceedings of the 39th conference on Winter simulation: 40 years! The best is yet to come, December 09-12, 2007, Washington D.C.