Performance Analysis of Cache Memories

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Performance Analysis of Cache Memories

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Journal of the ACM (JACM) archive
Volume 25 , Issue 3 (July 1978) table of contents

Pages: 378 - 395

Year of Publication: 1978

ISSN:0004-5411

Author

Gururaj S. Rao

IBM T J Watson Research Center, P.O Box 218, Yorktown Heights, NY and Standford University, Standford, California

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 8, Downloads (12 Months): 41, Citation Count: 26

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	ACEVEDO, M F A probablhsuc study of two-level storage hierarchies M S Th, U of Texas, Austin, Tex, Dec 1972.
	2	AVEN, O \|, ET AL Some results on distribution-free analysis of paging algorithms IEEE Trans Comptrs C-25, 7 (July 1976), 737-745
	3	Forest Baskett , Abbas Rafii, The A0 inversion model of program paging behavior, Stanford University, Stanford, CA, 1976
	4	BELADY, L A A study of replacement algorithms for virtual storage computers IBM Syst J. 5. 2 (1960), 78-101
	5	BELL, J, CASASENT, D, AND BELL, C G An mvest~gaUon of alternauve cache orgamzatlons IEEE Trans Comptrs. C-23, 4 (April 1974), 346-351
	6	BURVILLE, P J, AND KINGMAN, J F C On a model for storage and search J Appl Probabd~ty 10 (1973), 697-701
	7	Edward G. Coffman, Jr. , Peter J. Denning, Operating Systems Theory, Prentice Hall Professional Technical Reference, 1973
	8	E. G. Coffman, Jr. , Thomas A. Ryan, Jr., A study of storage partitioning using a mathematical model of locality, Communications of the ACM, v.15 n.3, p.185-190, March 1972 [doi>10.1145/361268.361280]
	9	CONTI, C J Concepts for buffer storage Comptr Group News 2, 8 (March 1969), 9-13
	10	Domenico Ferrari, Improving locality by critical working sets, Communications of the ACM, v.17 n.11, p.614-620, Nov. 1974 [doi>10.1145/361179.361195]
	11	FERRArl, D Improving program locality by strategy-oriented restructuring Information Processing, North- Holland Pub Co, Amsterdam, 1974, pp 266-270
	12	P. A. Franaszek , T. J. Wagner, Some Distribution-Free Aspects of Paging Algorithm Performance, Journal of the ACM (JACM), v.21 n.1, p.31-39, Jan. 1974 [doi>10.1145/321796.321800]
	13	GEL~.t~BE, E A unified approach to the evaluatmn of a class of replacement algorithms 1EEE Trans Comptrs C-22, 6 (June 1973), 611-618
	14	HATFmLO, D J, AND GErALO, J Program restructuring for virtual memory IBM Syst J 10, 3 (1971), 168-192
	15	Frederick S. Hillier , Gerald J. Lieberman, Introduction to operations research, 4th ed., Holden-Day, Inc., San Francisco, CA, 1986
	16	J. Johnson, PROGRAM RESTRUCTURING FOR VIRTUAL SYSTEMS, Massachusetts Institute of Technology, Cambridge, MA, 1975
	17	KIN,:,, W F Analysis of paging algorithms Proc IFIP Congress, Ljublanjana, Yugoslavia, Aug 1971, 485-490
	18	LENFANT, J The delay network model of program behawour In Computer Architecture and Networks, E Gelenbe and R Mahl, Eds, North-Holland Pub Co, Amsterdam, 1974, pp 299-329
	19	S. E. Madnick, STORAGE HIERARCHY SYSTEMS, Massachusetts Institute of Technology, Cambridge, MA, 1973
	20	Stuart E. Madnick , John J. Donovan, Operating Systems, McGraw-Hill, Inc., New York, NY, 1974
	21	RAo, G S Performance analysis of cache memories Tech Rep No 110, SEL 76-019, Digital Systems Lab, Depts EE and Comptr Sci, Stanford U,, Stanford, Cahf, 1975
	22	B. R Rau, The stack working set: a characterization of spatial locality, Stanford University, Stanford, CA, 1975
	23	RAU, B R, AND ROSSMANN, G E Cache based computer systems A tutorial Tech Rep, Palyn Assocs, San Jose, Cahf, March 1974
	24	RIVEST, R L On self-organizing sequentml search heunsucs Res Rep 61, IRIA Labona, Le Chesnay, France, March 1974
	25	SHEMER, J E, AND SHIPPEY, G A Statistical analysis of paged and segmented computer systems 1EEE Trans Electron Comptrs EC-15. 6 (Dec 1966), 855-863

CITED BY 26

	A. Agarwal , J. Hennessy , M. Horowitz, An analytical cache model, ACM Transactions on Computer Systems (TOCS), v.7 n.2, p.184-215, May 1989
	Richard E. Ladner , James D. Fix , Anthony LaMarca, Cache performance analysis of traversals and random accesses, Proceedings of the tenth annual ACM-SIAM symposium on Discrete algorithms, p.613-622, January 17-19, 1999, Baltimore, Maryland, United States
	Mark S. Papamarcos , Janak H. Patel, A low-overhead coherence solution for multiprocessors with private cache memories, 25 years of the international symposia on Computer architecture (selected papers), p.284-290, June 27-July 02, 1998, Barcelona, Spain
	Anthony LaMarca , Richard E. Ladner, The influence of caches on the performance of sorting, Proceedings of the eighth annual ACM-SIAM symposium on Discrete algorithms, p.370-379, January 05-07, 1997, New Orleans, Louisiana, United States
	Michel Dubois , Faye A. Briggs, Efficient interprocessor communication for MIMD multiprocessor systems, Proceedings of the 8th annual symposium on Computer Architecture, p.187-196, May 12-14, 1981, Minneapolis, Minnesota, United States
	Donghee Lee , Jongmoo Choi , Jong-Hun Kim , Sam H. Noh , Sang Lyul Min , Yookun Cho , Chong Sang Kim, On the existence of a spectrum of policies that subsumes the least recently used (LRU) and least frequently used (LFU) policies, ACM SIGMETRICS Performance Evaluation Review, v.27 n.1, p.134-143, June 1999
	James D. Fix, The set-associative cache performance of search trees, Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms, January 12-14, 2003, Baltimore, Maryland
	Jeffrey J. Rothschild, Cache organizations, Proceedings of the 17th annual Southeast regional conference, p.106-110, April 09-11, 1979, Orlando, Florida
	Trishul M. Chilimbi , Mark D. Hill , James R. Larus, Cache-conscious structure layout, ACM SIGPLAN Notices, v.34 n.5, p.1-12, May 1999
	Fayé A. Briggs , Michel Dubois, Performance of cache-based multiprocessors, ACM SIGMETRICS Performance Evaluation Review, v.10 n.3, p.181-190, Fall 1981
	Asit Dan , Don Towsley, An approximate analysis of the LRU and FIFO buffer replacement schemes, ACM SIGMETRICS Performance Evaluation Review, v.18 n.1, p.143-152, May 1990
	W. C. Yen , K. S. Fu, Analysis of multiprocessor cache organizations with alternative main memory update policies, Proceedings of the 8th annual symposium on Computer Architecture, p.89-105, May 12-14, 1981, Minneapolis, Minnesota, United States
	D. Lee , J. Choi , J. H. Kim , S. H. Noh , S. L. Min , Y. Cho , C. S. Kim, LRFU: A Spectrum of Policies that Subsumes the Least Recently Used and Least Frequently Used Policies, IEEE Transactions on Computers, v.50 n.12, p.1352-1361, December 2001
	James R. Goodman, Using cache memory to reduce processor-memory traffic, ACM SIGARCH Computer Architecture News, v.11 n.3, p.124-131, June 1983
	James E. Smith , James R. Goodman, A study of instruction cache organizations and replacement policies, ACM SIGARCH Computer Architecture News, v.11 n.3, p.132-137, June 1983
	Dominique Thiébaut, On the Fractal Dimension of Computer Programs and its Application to the Prediction of the Cache Miss Ratio, IEEE Transactions on Computers, v.38 n.7, p.1012-1026, July 1989
	James R. Goodman, Using cache memory to reduce processor-memory traffic, 25 years of the international symposia on Computer architecture (selected papers), p.255-262, June 27-July 02, 1998, Barcelona, Spain
	Mark S. Papamarcos , Janak H. Patel, A low-overhead coherence solution for multiprocessors with private cache memories, ACM SIGARCH Computer Architecture News, v.12 n.3, p.348-354, June 1984
	Jaswinder Pal Singh , Harold S. Stone , Dominique F. Thiébaut, A Model of Workloads and its Use in Miss-Rate Prediction for Fully Associative Caches, IEEE Transactions on Computers, v.41 n.7, p.811-825, July 1992
	Anthony LaMarca , Richard Ladner, The influence of caches on the performance of heaps, Journal of Experimental Algorithmics (JEA), 1, p.4-es, 1996
	Vibhu Saujanya Sharma , Kishor S. Trivedi, Architecture based analysis of performance, reliability and security of software systems, Proceedings of the 5th international workshop on Software and performance, p.217-227, July 12-14, 2005, Palma, Illes Balears, Spain
	Vidyadhar Phalke, A time invariant working set model for independent reference, Proceedings of the 33rd annual on Southeast regional conference, March 17-18, 1995, Clemson, South Carolina
	Javed Absar , Francky Catthoor, Analysis of scratch-pad and data-cache performance using statistical methods, Proceedings of the 2006 conference on Asia South Pacific design automation, January 24-27, 2006, Yokohama, Japan
	Le Cai , Yung-Hsiang Lu, Power reduction of multiple disks using dynamic cache resizing and speed control, Proceedings of the 2006 international symposium on Low power electronics and design, October 04-06, 2006, Tegernsee, Bavaria, Germany
	A. Hartstein , V. Srinivasan , T. R. Puzak , P. G. Emma, Cache miss behavior: is it √2?, Proceedings of the 3rd conference on Computing frontiers, May 03-05, 2006, Ischia, Italy
	Vibhu Saujanya Sharma , Kishor S. Trivedi, Quantifying software performance, reliability and security: An architecture-based approach, Journal of Systems and Software, v.80 n.4, p.493-509, April, 2007