Code Generation for Expressions with Common Subexpressions

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Code Generation for Expressions with Common Subexpressions

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Journal of the ACM (JACM) archive
Volume 24 , Issue 1 (January 1977) table of contents

Pages: 146 - 160

Year of Publication: 1977

ISSN:0004-5411

Authors

A. V. Aho	Bell Laboratories, Murray Hill, NJ
S. C. Johnson	Bell Laboratories, Murray Hill, NJ
J. D. Ullman	Dept. of EECS, Princeton University, Princeton, NJ

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 5, Downloads (12 Months): 78, Citation Count: 43

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ABSTRACT

This paper shows the problem of generating optimal code for expressions containing common subexpressions is computationally difficult, even for simple expressions and simple machines. Some heuristics for code generation are given and their worst-case behavior is analyzed. For one register machines, an optimal code generation algorithm is given whose time complexity is linear in the size of an expression and exponential only in the amount of sharing.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	T. J. Kowalski , D. E. Thomas, The VLSI design automation assistant: prototype system, Papers on Twenty-five years of electronic design automation, p.561-565, June 1988
	Bhaskaram Prabhala , Ravi Sethi, Efficient Computation of Expressions with Common Subexpressions, Journal of the ACM (JACM), v.27 n.1, p.146-163, Jan. 1980
	Jack W. Davidson, A retargetable instruction reorganizer, ACM SIGPLAN Notices, v.21 n.7, p.234-241, July 1986
	Guido Araujo , Sharad Malik, Code generation for fixed-point DSPs, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.3 n.2, p.136-161, April 1998
	J. R. Goodman , W.-C. Hsu, Code scheduling and register allocation in large basic blocks, Proceedings of the 2nd international conference on Supercomputing, p.442-452, June 1988, St. Malo, France
	S. C. Prasad , K. Roy, Transistor reordering for power minimization under delay constraint, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.1 n.2, p.280-300, April 1996
	E. Pelegrí-Llopart , S. L. Graham, Optimal code generation for expression trees: an application BURS theory, Proceedings of the 15th ACM SIGPLAN-SIGACT symposium on Principles of programming languages, p.294-308, January 10-13, 1988, San Diego, California, United States
	S. C. Johnson, A portable compiler: theory and practice, Proceedings of the 5th ACM SIGACT-SIGPLAN symposium on Principles of programming languages, p.97-104, January 23-25, 1978, Tucson, Arizona
	John L. Hennessy , Thomas Gross, Postpass Code Optimization of Pipeline Constraints, ACM Transactions on Programming Languages and Systems (TOPLAS), v.5 n.3, p.422-448, July 1983
	A. V. Aho , S. C. Johnson , J. D. Ullman, Code-generation for machines with multiregister operations, Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages, p.21-28, January 17-19, 1977, Los Angeles, California
	Guido Araujo , Guilherme Ottoni , Marcelo Cintra, Global array reference allocation, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.7 n.2, p.336-357, April 2002
	Gert Goossens , Johan Van Praet , Dirk Lanneer , Werner Geurts , Augusli Kifli , Clifford Liem , Pierre G. Paulin, Embedded software in real-time signal processing systems: design technologies, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	J. A. van Hulzen, Breuer's grow factor algorithm in computer algebra, Proceedings of the fourth ACM symposium on Symbolic and algebraic computation, p.100-104, August 05-07, 1981, Snowbird, Utah, United States
	Bhaskaram Prabhala , Ravi Sethi, Efficient computation of expressions with common subexpressions, Proceedings of the 5th ACM SIGACT-SIGPLAN symposium on Principles of programming languages, p.222-230, January 23-25, 1978, Tucson, Arizona
	Timothy J. Callahan , Philip Chong , André DeHon , John Wawrzynek, Fast module mapping and placement for datapaths in FPGAs, Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays, p.123-132, February 22-25, 1998, Monterey, California, United States
	Alok Jain , Randal E. Bryant, Mapping switch-level simulation onto gate-level hardware accelerators, Proceedings of the 28th conference on ACM/IEEE design automation, p.219-222, June 17-22, 1991, San Francisco, California, United States
	Robert J. Sheraga , John L. Gieser, Automatic microcode generation for horizontally microprogrammed processors, ACM SIGMICRO Newsletter, v.12 n.4, p.154-168, Dec. 1981
	Steven J. Deitz , Bradford L. Chamberlain , Lawrence Snyder, Eliminating redundancies in sum-of-product array computations, Proceedings of the 15th international conference on Supercomputing, p.65-77, June 2001, Sorrento, Italy
	David Bernstein , Haran Boral , Ron Y. Pinter, Optimal chaining in expression trees, ACM SIGPLAN Notices, v.21 n.7, p.1-10, July 1986
	S. Liao , K. Keutzer , S. Tjiang , S. Devadas, A new viewpoint on code generation for directed acyclic graphs, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.3 n.1, p.51-75, Jan. 1998
	K. Keutzer, DAGON: Technology binding and local optimization by DAG matching, Papers on Twenty-five years of electronic design automation, p.617-624, June 1988
	K. Keutzer, DAGON: technology binding and local optimization by DAG matching, Proceedings of the 24th ACM/IEEE conference on Design automation, p.341-347, June 28-July 01, 1987, Miami Beach, Florida, United States
	David Bernstein , Izidor Gertner, Scheduling expressions on a pipelined processor with a maximal delay of one cycle, ACM Transactions on Programming Languages and Systems (TOPLAS), v.11 n.1, p.57-66, Jan. 1989
	Christoph Keßler , Andrzej Bednarski, A Dynamic Programming Approach to Optimal Integrated Code Generation, ACM SIGPLAN Notices, v.36 n.8, p.165-174, Aug. 2001
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