An Approach to Multilevel Boolean Minimization

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An Approach to Multilevel Boolean Minimization

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Journal of the ACM (JACM) archive
Volume 11 , Issue 3 (July 1964) table of contents

Pages: 283 - 295

Year of Publication: 1964

ISSN:0004-5411

Author

Eugene L. Lawler

The University of Michigan, Information Systems Laboratory, Department of Electrical Engineering, Ann Arbor, Michigan

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 35, Citation Count: 10

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	ABHYANKA- S. Minimal "sum of products of stuns" expressions of Boolean functions. IRE Trans. EC-7 (Dee. 1958), 268-276.
	2	----. Absolute minimal expressions of Boolean functions. IRE Trans. EC-8 (March 1959), 3-8.
	3	KARP, R. M., McFxrtLIN, F. E., RorH, J. P., WILTS, J.R. A computer program for the synthesis of cornbinational switching circuits. Paper, AIEE Syrup. Switching Circuit Theory, Detroit, Mich., Oct,ober, 1961.
	4	MEo, A. R, On the minimal third order expression of a Boolean fuuction. Paper, AIEE Syrup. Switching Circuit Theory and Logical Design, Chicago, Sept. 1962.
	5	MKHOPVDHYAY, A. Detection of disluncts of switching functions and multi-level circuit design. J. Elect, Contr. 10, 1 (Jan. 1961), 45-55.
	6	ROTH, J.P. Minimization over Boolean trees. IBM J. Research Develop. 4, 5 (Nov. 1960), 543-558.
	7	---- and WaGNaER E.G. Algebraic topological methods for the synthesis of switchiug systems, Part III: Minimization of nonsiagular Boolean trees. IBM J. Research Develop. 4 (Oct. 1959), 326-344.
	8	SEMON, W.L. Synthesis of series-parallel network functions. Bell Systems Tech. J. 37, 4 (1958).
	9	VEITCH, E. W. Logical equation minimization involving higher order solutions. Proceedings of the International Conference on Information Processing, UNESCO, 423-424 (Butterworths, London, 1959).
	10	WRIGHT, W. Synthesis of minimal series-parallel switching circuits. Investigations of the Theory of Switching, Vol. BL-13, Harvard Computation Laboratory, 1955.

CITED BY 10

	Maurizio Damiani , Jerry Chih-Yuan Yang , Giovanni De Micheli, Optimization of combinational logic circuits based on compatible gates, Proceedings of the 30th international conference on Design automation, p.631-636, June 14-18, 1993, Dallas, Texas, United States
	Vivek V. Shende , Aditya K. Prasad , Igor L. Markov , John P. Hayes, Reversible logic circuit synthesis, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.353-360, November 10-14, 2002, San Jose, California
	Tsutomu Sasao, An application of multiple-valued logic to a design of programmable logic arrays, Proceedings of the eighth international symposium on Multiple-valued logic, p.65-72, January 1978, Rosemont, Illinois, United States
	Ronald C. De Vries, Minimal Sets of Distinct Literals for a Logically Passive Function, Journal of the ACM (JACM), v.18 n.3, p.431-443, July 1971
	Ronald C. de Vries, Comment on Lawler's multilevel Boolean minimization, Communications of the ACM, v.13 n.4, p.265-266, April 1970
	Hirendu Vaishnav , Massoud Pedram, Minimizing the routing cost during logic extraction, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.70-75, June 12-16, 1995, San Francisco, California, United States
	L. Diaz-Olavarrieta , S. G. Zaky, A new synthesis technique for multilevel combinational circuits, Proceedings of the conference on European design automation, March 12-15, 1990, Glasgow, Scotland
	Robert K. Brayton, The future of logic synthesis and verification, Logic Synthesis and Verification, Kluwer Academic Publishers, Norwell, MA, 2001
	Neil C. Rowe, Absolute Bounds on Set Intersection and Union Sizes from Distribution Information, IEEE Transactions on Software Engineering, v.14 n.7, p.1033-1048, July 1988
	Minos Garofalakis , Aristides Gionis , Rajeev Rastogi , S. Seshadri , Kyuseok Shim, XTRACT: Learning Document Type Descriptors from XML Document Collections, Data Mining and Knowledge Discovery, v.7 n.1, p.23-56, January 2003