Performance prediction of loop constructs on multiprocessor hierarchical-memory systems

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Performance prediction of loop constructs on multiprocessor hierarchical-memory systems

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International Conference on Supercomputing archive
Proceedings of the 3rd international conference on Supercomputing table of contents

Crete, Greece

Pages: 433 - 442

Year of Publication: 1989

ISBN:0-89791-309-4

Authors

Kyle Gallivan	Center for Supercomputing Research and Development, University of Illinois at Urbana Champaign, Urbana, Illinois
William Jalby	Center for Supercomputing Research and Development, University of Illinois at Urbana Champaign, Urbana, Illinois
Allen Maloney	Center for Supercomputing Research and Development, University of Illinois at Urbana Champaign, Urbana, Illinois
Harry Wijshoff	Center for Supercomputing Research and Development, University of Illinois at Urbana Champaign, Urbana, Illinois

Sponsors

Computer Tech Inst. : Computer Technology Institute
SIGARCH: ACM Special Interest Group on Computer Architecture
SIAM : Society for Industrial and Applied Mathematics
AICA : Assoc Italianai de Calcolo Automatico

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 10, Downloads (12 Months): 15, Citation Count: 9

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ABSTRACT

In this paper we discuss the performance prediction of Fortran constructs commonly found in numerical scientific computing. Although the approach is applicable to multi-processors in general, within the scope of the paper we will concentrate on the Alliant FX/8 multiprocessor. The techniques proposed involve a combination of empirical observations, architectural models and analytical techniques, and exploits earlier work on data locality analysis and empirical characterization of the behavior of memory systems. The Lawrence Livermore Loops are used as a test-case to verify the approach.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	D. Gannon , W. Jalby , K. Gallivan, Strategies for cache and local memory management by global program transformation, Proceedings of the 1st International Conference on Supercomputing, p.229-254, March 1988, Athens, Greece
	2	K. Gallivan , W. Jalby , D. Gannon, On the problem of optimizing data transfers for complex memory systems, Proceedings of the 2nd international conference on Supercomputing, p.238-253, June 1988, St. Malo, France [doi>10.1145/55364.55388]
	3	Ga~van, K., Cannon, D., Jalby, W., Malony, A., and Wijshoff, H., Behavioral Characterization of Multip,ocessor Memory Systems: A Case Study, CSRD Report 808, University of Nlinois, 1988.
	4	McMahon, F., The Livermore Fortran Kernels: A Computer Test of the Numerical Perjformance Range, Report U CRL-53745, Lawrence Livermore National Laboratory, Dec. I986.
	5	Dennis Gannon , William Jalby , Kyle Gallivan, Strategies for cache and local memory management by global program transformation, Journal of Parallel and Distributed Computing, v.5 n.5, p.587-616, October 1988 [doi>10.1016/0743-7315(88)90014-7]
	6	Berstel, 3. and Perrin, D., Theorgt of Codes, ~oi 117, Pure and Applied Mathematics, Academic Press, New York, 1985.
	7	Harry A. G. Wijshoff, Data Organization in Parallel Computers, Kluwer Academic Publishers, Norwell, MA, 1989

CITED BY 9

	Thomas Fahringer , Roman Blasko , Hans P. Zima, Automatic performance prediction to support parallelization of Fortran programs for massively parallel systems, Proceedings of the 6th international conference on Supercomputing, p.347-356, July 19-24, 1992, Washington, D. C., United States
	D. Arapattu , D. Gannon, Building analytical models into an interactive performance prediction tool, Proceedings of the 1989 ACM/IEEE conference on Supercomputing, p.521-530, November 12-17, 1989, Reno, Nevada, United States
	D. Windheiser , W. Jalby, Behavioral characterization of decoupled access/execute architecture, Proceedings of the 5th international conference on Supercomputing, p.28-39, June 17-21, 1991, Cologne, West Germany
	Thomas Fahringer , Hans P. Zima, A static parameter based performance prediction tool for parallel programs, Proceedings of the 7th international conference on Supercomputing, p.207-219, July 19-23, 1993, Tokyo, Japan
	Arjan J. C. van Gemund, Compiling performance models from parallel programs, Proceedings of the 8th international conference on Supercomputing, p.303-312, July 11-15, 1994, Manchester, England
	Arjan J. C. van Gemund, Performance prediction of parallel processing systems: the PAMELA methodology, Proceedings of the 7th international conference on Supercomputing, p.318-327, July 19-23, 1993, Tokyo, Japan
	Ko-Yang Wang, Precise compile-time performance prediction for superscalar-based computers, ACM SIGPLAN Notices, v.29 n.6, p.73-84, June 1994
	Eric L. Boyd , Edward S. Davidson, Hierarchical performance modeling with MACS: a case study of the convex C-240, ACM SIGARCH Computer Architecture News, v.21 n.2, p.203-210, May 1993
	K. Gallivan , D. Gannon , W. Jalby , A. Malony , H. Wijshoff, Experimentally Characterizing the Behavior of Multiprocessor Memory Systems: A Case Study, IEEE Transactions on Software Engineering, v.16 n.2, p.216-223, February 1990