Performance benefits of large execution atomic units in dynamically scheduled machines

ABSTRACT

In this paper we identify three types of atomic units, or indivisible units of work: architectural atomic units (defined by architecture level interrupts and exceptions), compiler atomic units (defined by compiler code generation) and execution atomic units (defined by run-time interruptibility). We discuss trade-offs for these units and show that size has different performance implications depending on the atomic unit. We simulate a number of different implementations of the VAX architecture, focusing on different execution atomic unit sizes. We show that significant performance benefits can be achieved by having large execution atomic units in dynamically scheduled machines.

REFERENCES

• 1: J. A. Fisher, "Trace Scheduling' ATe, l,,t,que for Global Microcode Compaction," {EEl"_.' Transactions on Computers, vo{, 0-30, rio. 7, July 1981.
• 2: W.-M. W. Hwu , Y. N. Patt, Checkpoint repair for high-performance out-of-order execution machines, IEEE Transactions on Computers, v.36 n.12, p.1496-1514, Dec. 1987 [doi>10.1109/TC.1987.5009500]
• 3: W. Hwu , Y. N. Patt, HPSm, a high performance restricted data flow architecture having minimal functionality, Proceedings of the 13th annual international symposium on Computer architecture, p.297-306, June 02-05, 1986, Tokyo, Japan
• 4: S. W. Melvin , M. C. Shebanow , Y. N. Patt, Hardware support for large atomic units in dynamically scheduled machines, Proceedings of the 21st annual workshop on Microprogramming and microarchitecture, p.60-63, November 28-December 02, 1988, San Diego, California, United States
• 5: Y. N. Patt , W. M. Hwu , M. Shebanow, HPS, a new microarchitecture: rationale and introduction, Proceedings of the 18th annual workshop on Microprogramming, p.103-108, December 03-06, 1985, Pacific Grove, California, United States
• 6: Yale N. P~tt, Michael C. Shebanow. Wen-reel Hwu and Stephen W. Melvin, "A C Conlpiler for HPS 1, A Highly ParMle{ Execution Engine," Proceedings, 19tb Hawaii fnternational Conferemce on System Sciences, Honolulu, HI..january 1986.
• 7: George R~ai-, "The 801 Minicomputer," IBM JournM of Research and Development. Vol. 27, No. 3, May 1983, pp. 2aZ-'246.
• 8: R. M. Tomas.ulo, "An Efficient Algorithm fo~ Exploiting Multiple Arithmetic Units," fBM Journal of Research and Development, Vol. 11, 1967, pp. 25-33.

INDEX TERMS

Primary Classification:
  G. Mathematics of Computing
  G.1 NUMERICAL ANALYSIS

Additional Classification:
  C. Computer Systems Organization
  C.5 COMPUTER SYSTEM IMPLEMENTATION

  F. Theory of Computation
  F.2 ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY
      F.2.2 Nonnumerical Algorithms and Problems
          Subjects: Sequencing and scheduling

  I. Computing Methodologies
  I.2 ARTIFICIAL INTELLIGENCE
      I.2.8 Problem Solving, Control Methods, and Search
          Subjects: Scheduling

General Terms:
Design, Experimentation, Measurement, Performance, Theory