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Control flow optimization for supercomputer scalar processing
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Source International Conference on Supercomputing archive
Proceedings of the 3rd international conference on Supercomputing table of contents
Crete, Greece
Pages: 145 - 153  
Year of Publication: 1989
ISBN:0-89791-309-4
Authors
Pohua P. Chang  Coordinated Science Laboratory, University of Illinois, 1101 W. Springfield Ave., Urbana, IL
Wen-mei W. Hwu  Coordinated Science Laboratory, University of Illinois, 1101 W. Springfield Ave., Urbana, IL
Sponsors
Computer Tech Inst. : Computer Technology Institute
SIGARCH: ACM Special Interest Group on Computer Architecture
SIAM : Society for Industrial and Applied Mathematics
AICA : Assoc Italianai de Calcolo Automatico
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 10,   Downloads (12 Months): 23,   Citation Count: 3
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ABSTRACT

Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instructions disrupt the flow of instructions through the pipeline, degrading the utilization of the pipelined datapaths. This paper describes control flow optimization for scalar processing using an optimizing compiler. To obtain program control flow information, a system independent profiler has been integrated into the IMPACT-I C compiler. The control flow information obtained is converted into a weighted control graph. Based on the weighted control graph, function inline expansion, multi-way branch layout, and software branch prediction can be implemented. Using better compiler technology results in a very low cost hardware control unit (architecture) for high performance scalar processors.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Pohua P. Chang: colleagues
Wen-mei W. Hwu: colleagues