A technology independent approach to hierarchical IC layout extraction

ABSTRACT

This paper describes a set of heuristics for a hierarchical circuit extractor. The strength of these algorithms lies in their capability for fully exploiting the natural hierarchical structure of IC layouts, and in handling overlapping cell instances without creating partial devices. Technology independence is implemented by keeping all technology dependent information in a user accessible file external to the program, which is also used to define the extent of parameter extraction. Circuit extraction is performed in a bottom-up manner and produces a netlist description with the same hierarchical structure as the layout.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Layout

  I. Computing Methodologies
  I.2 ARTIFICIAL INTELLIGENCE
      I.2.8 Problem Solving, Control Methods, and Search
          Subjects: Heuristic methods

  J. Computer Applications

General Terms:
Algorithms, Design, Measurement, Performance, Theory