Switch-level simulation of VLSI using a special-purpose data-driven computer

ABSTRACT

In this paper I present the algorithms, architecture, and performance of the FAST-1, a special-purpose data-driven computer for switch-level simulation of VLSI circuits. The FAST-1 algorithm computes the same steady state as Bryant's Mossimll algorithm, using a similar network model. The architecture of the simulation machine follows directly from the simulation algorithm and, like the algorithm, is very simple. While the machine has not yet been implemented in hardware, a software-implementation of the proposed architecture has allowed the architecture's performance to be measured in terms of the number of Read-Modify-Write memory cycles required to perform a given simulation. Measurements of circuits ranging in size from a hundred to over 20K transistors indicate that a hardware implementation of the simulation machine will run orders of magnitude faster than software-implemented simulators running on general-purpose computers built using similar technology.

REFERENCES

• 1: Abramovici, M., Levendel, Y.H., and Idemon, P.R., 'A Logic Simulation Machine', IEEE Trans. on Computer Aided Design, C&D-2, 2 (April 1983}, 82.94.
• 2: Bryant, R., 'A Switch-Level Model and Simulator for MOS Digital Systema*, Trans. on Computers, C.33, 2 (February t984), I60-177.
• 3: Dally, W. J., 'A MOSSIM Simulation Machine- Ag(:hitecture and Design', Tech. Rap.512.3:TR:84, C81tech, April 1984.
• 4: Monty M. Denneau, The Yorktown Simulation Engine, Proceedings of the 19th conference on Design automation, p.55-59, January 1982
• 5: P. L. Flake , P. R. Moorby , G. Musgrave, An algebra for logic strength simulation, Proceedings of the 20th conference on Design automation, p.615-618, June 27-29, 1983, Miami Beach, Florida, United States
• 6: Edward Harrison Frank, A data-driven multiprocessor for switch-level simulation of vlsi circuits, 1985
• 7: Terman, C., Simulation Toole/or Digital LSi D~fign, PhD dissertation, MIT, September 1983.
• 8: Zycad, Inc., Zycacl LE. 1001 and LE-IO02 Logic Evaluator product description, Preliminary ed., Minneapolis, Minn., 1982.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Simulation

  J. Computer Applications

General Terms:
Algorithms, Design, Experimentation, Measurement, Performance, Theory