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The ADAM advanced design automation system: overview, planner and natural language interface
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 22nd ACM/IEEE Design Automation Conference table of contents
Las Vegas, Nevada, United States
Pages: 727 - 730  
Year of Publication: 1985
ISBN:0-8186-0635-5
Authors
John Granacki  University of Southern California
David Knapp  University of Southern California
Alice Parker  University of Southern California
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 2,   Downloads (12 Months): 12,   Citation Count: 23
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ABSTRACT

This paper describes ADAM, an integrated Advanced Design AutoMation system, with focus on the knowledge-based synthesis subsystem. Working parts of this subsystem include a number of design activities and utilities, and a unified, multidimensional, hierarchical design representation. Two aspects of the synthesis subsystem are described in detail: the design planner and the natural language interface. The planner builds a plan for synthesis and analysis activities, drawing inferences from a knowledge base represented by a semantic net. The natural language interface accepts system-level behavioral specifications. Both of these packages are currently being implemented.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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H. Afsarmanesh, D. Knapp, D. McLeod, and A. Parker. An Extensibte Object-Oriented Approath to Databasees for c~/v~sl. Submitted to the 11 th International Conference on Very Large Data Basvs.
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H. Brown and M. Slefik. Pa!ladio: An Expert Assistant for Integrated Circuit Design. 1982. Memo KB-VLSI-82-17 (working paper), Xerox PARC.
 
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Knapp, D. and Purger, A. A Data Strtteture f,~r VLSI Syntkesis and Verification. Technical Report DISC 88-6a, Digital Integrated Systems Center, Dept. of EE-Systems, University of Southern California, Octol,er, 1983.
 
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F~di Kurdahi and ^rice Parker. Wiring Space E~ti,~,ation of Sta,;:dard Cell Designs. Technical Report DISC/84-5, University of Southern California, Department of EE-Systems, November, 1984.
 
7
Landman, B. and Russo, R. On a Pin or Block l:elationship for Partitions of Logical Graphs. fEEE Transaction,~ on Computer.~ C-20:1469-1479, 1971.
 
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Park, N. and Parker, A. Synthesis of Optimal Clockino Schemes for Digital Systems. Technical Report DISC}84-1, Dept. of E~Systems, University of Southern Califorl, ia, May, 1984.
 
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Parker, A., Park, N. and Knapp, D. Simulation Ef fectivcne~ and Design Verification. Technical Report DISC/84~2, Department of EE-Systems, University of Southern California, October, 1984.
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CITED BY  23

Collaborative Colleagues:
John Granacki: colleagues
David Knapp: colleagues
Alice Parker: colleagues