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ALPS2: a standard cell layout system for double-layer metal technology
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 22nd ACM/IEEE Design Automation Conference table of contents
Las Vegas, Nevada, United States
Pages: 443 - 448  
Year of Publication: 1985
ISBN:0-8186-0635-5
Authors
C. P. Hsu  Hughes Aircraft Company, Newport Beach, California
B. N. Tien  Hughes Aircraft Company, Newport Beach, California
K. Chow  Hughes Aircraft Company, Newport Beach, California
R. A. Perry  Hughes Aircraft Company, Newport Beach, California
J. Tang  Hughes Aircraft Company, Newport Beach, California
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 5,   Downloads (12 Months): 5,   Citation Count: 2
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ABSTRACT

A layout style for double-layer metal standard cell design is described. Based on this particular style, an automatic layout system (ALPS2) is developed. It mixes state of the art placement and routing techniques in different stages of the layout process, which deviates from the traditional place-first-then-route strategy, and produces efficient results. The chip area comparisons between three single layer metal standard cell designs and those of the ALPS2 system showed up to 18% reduction by using the second layer metal.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Persky, G., et al.; "LTX - a Minicomputer Based System for Automatic LSI Layout", Jl. Design Automation and Fault Tolerant Comp., pp. 217-225, May, 1977.
 
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6
Cheng, C. K. and Kuh, E. S., "Partitioning and Placement Based on Network Optimization", Digest of Technical Papers, IEEE ICCAD, September, 1983, pp. 86-87.
 
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Sechen, C~, et al; "The Timberwolf Placement and Routing Package", IEEE CICC, 1984.
 
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Kirkpatrick, S., et al.; "Optimization by Simulated Annealing", IBM Comp. Sci./Eng. Tech. Report, Watson Research Center, 1982.
 
10
Aoshima, K. and Kuh, E. S., "Multi-Channel Optimization in Gate Array LSI Layout", Proc. IEEE ISCAS, 1983, pp. 1005-1008.
 
11
Aoshima, K., Private Notes.
 
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Munkres, J., "Algorithms for the Assignment and Transportation Problems", J. SIAM 5, March, 1957, pp. 32- 38.
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Yoshimura, T. and Kuh, E. S., "Efficient Algorithms for Channel Routing", IEEE Tran. on CAD, pp. 25-35, Jan. 1982.
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Sangiovanni-Vincentelli, A., et al ; "A New Gridless Channel Router: Yet Another Channel Router the Second (YACR-II)", IEEE ICCAD, 1984, pp. 72-75.
 
17
Hsu, C. P., Tien, B. N., "Automatic Layout for Double-Layer Metal Technology", 2nd Int. Symp. on VLSI Tech., Systems, and Applications, May, 1985.


Collaborative Colleagues:
C. P. Hsu: colleagues
B. N. Tien: colleagues
K. Chow: colleagues
R. A. Perry: colleagues
J. Tang: colleagues