| Automatic generation of digital system schematic diagrams |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 22nd ACM/IEEE Design Automation Conference
table of contents
Las Vegas, Nevada, United States
Pages: 388 - 395
Year of Publication: 1985
ISBN:0-8186-0635-5
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Authors
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Anjali Arya
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Elec. Engg. Deptt., Indian Institute of Technology, New Delhi-110016, India
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Anshul Kumar
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Comp. Sc. and Engg. Dept., Indian Institute of Technology, New Delhi-110016, India
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V. V. Swaminathan
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Elec. Engg. Deptt., Indian Institute of Technology, New Delhi-110016, India
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Amit Misra
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Elec. Engg. Deptt., Indian Institute of Technology, New Delhi-110016, India
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| Bibliometrics |
Downloads (6 Weeks): 1, Downloads (12 Months): 12, Citation Count: 3
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ABSTRACT
This paper presents a rigorous approach to automatic generation of schematic diagrams for digital systems described as networks of modules. This is very useful in comprehensive CAD environment. The approach is based on identification of some guidelines which are traditionally followed in manual drawing of schematic diagrams. Theses guidelines are transformed into quantitative objectives. In view of the complex interrelationship between these objectives, the schematic design process is broken into a long sequence of steps. An attempt is made to give rigorous formulation for each step, along with efficient solutions, making suitable approximations where necessary. An illustrative diagram generated using these algorithms is included showing that the results compare well with hand drawn diagrams.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CAD group EE Deptt. IITD."A Design Nethodology and Computer Aids for Digital systems",Computer Science & Informatics, l?8Z Vol 12, no. 2, pp 15-3z.
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Ei~i Kawamato,"Schematic Entry System with a Query Feature", Proceedings of the second ICCC, 1982, pp 503- 506.
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&shok Kumar et.al. ,"CHITRk - k low cost 2-D graphics package for the design of discrete systems", Prec. of Eurographics 82 Conf., 1982.
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Sanj&y S. Harathe and Raghunand&n R. Joshi,"A Placement Algorithm for Logic Schematics".
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Fakashi Yoshimura and Ernest S. Kuh "Efficient Algorithms for Channel Routing", IEEE Trans. on CAD of ICe and Systems, Jan. 1982, pp25-3~.
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S. Sastry a,d A. Parker,"The Complesity of Two-dimensiona! Compaction of VLSI layouts", Prec. of ICCC 82, New York, Sept-Oct 1982, pp 402-406
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O. L. Eaer,"Computer Systems Architecture", Computer Science Press, 1980, pp 144(IEH 370 p:OCIISOr block diagram).
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