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ABSTRACT
Testability is a very important aspect of VLSI circuits. Numerous design for testability (DFT) methods exist. Often designers face the complex problem of selecting the best DFT techniques for a particular chip under a set of design constraints and goals. In order to aid in designing testable circuits, a prototype knowledge based system has been developed which simulates a human expert on design of testable PLAs. The system, described in this paper, has knowledge about testable PLA design methodologies and is able to negotiate with the user so as to lead the user through the design space to find a satisfactory solution. A new search strategy, called reason analysis, is introduced.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 7
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John Granacki , David Knapp , Alice Parker, The ADAM advanced design automation system: overview, planner and natural language interface, Proceedings of the 22nd ACM/IEEE conference on Design automation, p.727-730, June 1985, Las Vegas, Nevada, United States
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