ACM Home Page
Please provide us with feedback. Feedback
The VLSI design automation assistant: what's in a knowledge base
Full text PdfPdf (670 KB)
Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 22nd ACM/IEEE Design Automation Conference table of contents
Las Vegas, Nevada, United States
Pages: 252 - 258  
Year of Publication: 1985
ISBN:0-8186-0635-5
Authors
T. J. Kowalski  AT&T Bell Laboratories, Murray Hill, New Jersey
D. E. Thomas  Carnegie-Mellon University, Electrical and Computer Engineering Department, Pittsburgh, PA
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 5,   Downloads (12 Months): 9,   Citation Count: 11
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/317825.317867
What is a DOI?

ABSTRACT

The Design Automation Assistant is a knowledge-based expert-system, KBES, that generates a technology-independent list of operators, registers, data paths and control signals from an algorithmic description of a VLSI system. One merit of codifying knowledge in a KBES is that it can be easily quantified and qualified. This paper takes a retrospective on that codified knowledge base, examining what has been learned about VLSI design. It discusses both the major steps in the implementation design process and the extent to which each rule embodies domain knowledge. Finally, the paper provides an example design with typical rules from each of the major steps in the implementation design process.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
 
2
Director, S. W., Parker, A. C., Siewiorek, D. P., and Thomas, D. E., "A design methodology and computer aids for digital VLSI systems," IEEE Transactions on
 
3
Thomas, D. E., Hitchock, C. Y. iii, Kowalski, T. J., Rajah, J. V., anti Walker, R., "'Automatic Data Path Synthesis," Computer 16(12) pp. 59-70 (December, 1983).
 
4
Kowalski, T. J. and Thomas, D. E., "The VLSI Design Automation Assistant" First Steps," TwemT-sixth IEEE Computer Society International Conference, pp. 126 - 130 (February 28, 1983).
 
5
 
6
Kowalski, T. J. and Thomas, D. E., "The VLSI Design Automation Assistant: An IBM System/370 Design," Design and Test cf Computers 1 (1) pp. 60-69 (February, 1984).
 
7
Kowalski, T. J., Geiger, D. J., Wolf, W. H., and Fichtner, W., "The VLSI Design Automation Assistant: A Birth In Industry," IEEE lnternation Symposium on Circuits and Systems, (June 5, 1985).
 
8
Forgy, C. L., OPS5 User's Manual, Department of Computer Science, Carnegie-Mellon University (July, 1981).
 
9
Rose, M, A., Structured Control Flow: An Architectural Technique figr improving Control Flow Performance, Masters thesis, Department of Electrical Engineering, Carnegie-Mellon University (November, 1983).
 
10
Kernighan, B. W. and Lin, S., "An Efficient Heuristic Procedure for Partitioning Graphs," Bell Sys. Tech. J. 49(2) pp. 291-308 (I 970).
11
 
12
 
13
 
14
Barbacci, M. R., Barnes, G. E., Cattell, R. G., and Siewiorek, D. P., The ISPS Computer Description Language, Department of Computer Science,
 
15
 
16
Kowalski, T. J., Computer-Aided Cost Estimation from Implementation Specifications, (unpublished).
 
17

CITED BY  11

Collaborative Colleagues:
T. J. Kowalski: colleagues
D. E. Thomas: colleagues