ACM Home Page
Please provide us with feedback. Feedback
Design of a general purpose meta-assembler for parallel processor environment in ISPS
Full text PdfPdf (801 KB)
Source Annual Simulation Symposium archive
Proceedings of the 22nd annual symposium on Simulation table of contents
Tampa, Florida, United States
Pages: 105 - 117  
Year of Publication: 1989
ISBN:0-8186-1946-5
Authors
M. R. Brown  General Electric Company, valley Forge, PA
S. DasGupta  Temple University, Electrical Engineering Division, Philadelphia, PA
Sponsor
SIGSIM: ACM Special Interest Group on Simulation and Modeling
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 1,   Downloads (12 Months): 6,   Citation Count: 1
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  

ABSTRACT

This paper discusses the design of a general-purpose meta-assembler for both single processor and parallel processor environments to be used as a software tool to improve upon the capability of the ISPS (Instruction Set Processor Specification) simulator. Currently, it is not feasible to simulate multi-microprocessor systems capable of performing parallel processing tasks efficiently in the ISPS language. There remains the problem of running long benchmark programs that have to be written in the machine code of the particular architecture(s) under study. With this in mind run-time results of simulated benchmark programs will be reported for various configurations of parallel processing systems using the meta-assembler. We introduce a general purpose assembler for ISPS which will generate the machine code for simulation files. This software package eliminates the inefficiency of writing and testing long benchmark programs in the machine code by providing the user with the capability of writing them in assembly language. This package provides for existing assembly languages and can allow the user to create assembly languages for other possible architecture designs. It is hoped that this software package will make ISPS a more complete and powerful hardware description language.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Bell, Gordon, Newel, and Allen, "Computer Structures, Principles and Examples" (McGraw Hill, 1971)
 
2
Barbacci, M.R., Barnes G.E., Cattel, R.C. and Siewiorek, D.P., "The ISPS Computer Description Language" Carnegie-Mellon Univ (1977).
 
3
DasGupta, S , "Computer Design and Description languages" Advances in Computers, Vol 21, 1982.
 
4
Barbacci, M.R., "Instruction Set Processing Specifications(ISPS): The Notation and Its Applications", IEEE Transactions on Computers, Vol. C~30, No.l, Jan. 1981.
 
5
Barbacci, M.R., "The Register Transfer Machine", (Technical Report, Carnegie-mellon Univ. 1977).
 
6
DasGupta, S., Ozcanhan, M.H., "A Meta-Assembler for Creating the simulation Files of the Instruction Set Processor Specifications", International Symposium on Computer Hardware Description Language of IFIP (1987).
 
7
DasGupta, S., Brown, M.R., "A General Meta-Assembler for the Architecture Description Language ISPS , International Symposium on Electronic Devices, Circuits and Systems (1987).
 
8
Barbacci, M.R., "The ISPS Description Language Manual", Carnegie- Mellon Univ., Edition 2, Aug. 1982.
 
9
 
10
Rector, R., A1exy, G., "The 8086 Book", Osborne/McGraw Hill, California 1980.
 
11
Kane, G., Hawkins, D., Leventhal, L., "68000 Assembly Language Programming", Osborne/McGraw hill, Cal. 1981.
 
12
Patterson, D A., Sequin, C.H., "RISCI: A Reduced Instruction Set VLSI Computer" IEEE Transactions on Computers, 1981
 
13
Patterson, D.A., "A RISCy Approach to Computer Design", IEEE Transactions on Computers, 1982.
 
14
Patterson, D.A., "RISC Assessment: A High Level Language Experiment" IEEE Transactions on Computers, 1982
 
15
 
16
 
17
Flynn, M.J., "Some Computer Organizations and Their Effectiveness", IEEE Transactions on Computers, C-21, No. 9, Sept. 1972, pp. 948-960.
 
18
Siegel, H.J., Siegel, L.J., Kemmerer, eta1., "PASM: A Partitionable SIMD/MIMD System for Image Processing and pattern Recognition", IEEE Transactions on Computers, C-30, No. 12, Dec. 1981, pp. 934-947.


Collaborative Colleagues:
M. R. Brown: colleagues
S. DasGupta: colleagues