Databus charge recovery

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Databus charge recovery: practical considerations

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 1999 international symposium on Low power electronics and design table of contents

San Diego, California, United States

Pages: 85 - 87

Year of Publication: 1999

ISBN:1-58113-133-X

Authors

Benjamin Bishop	Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA
Mary Jane Irwin	Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 10, Citation Count: 3

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Gary K. Yeap, Practical low power digital VLSI design, Kluwer Academic Publishers, Norwell, MA, 1998
	2	Kei-Yong Khoo , Alan N. Wilson, Jr., Charge recovery on a databus, Proceedings of the 1995 international symposium on Low power design, p.185-189, April 23-26, 1995, Dana Point, California, United States [doi>10.1145/224081.224114]
	3	Chunho Lee , Miodrag Potkonjak , William H. Mangione-Smith, MediaBench: a tool for evaluating and synthesizing multimedia and communicatons systems, Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, p.330-335, December 01-03, 1997, Research Triangle Park, North Carolina, United States
	4	Hui Zhang , Jan Rabaey, Low-swing interconnect interface circuits, Proceedings of the 1998 international symposium on Low power electronics and design, p.161-166, August 10-12, 1998, Monterey, California, United States [doi>10.1145/280756.280876]
	5	Anantha P. Chandrakasan , Robert W. Brodersen, Low Power Digital CMOS Design, Kluwer Academic Publishers, Norwell, MA, 1995
	6	T. Austin, D. Burger, "The SimpleScalar Architectural Research Tool Set, Version 2.0", http://www, cs. wisc. edu/-mscalar/simplescalar, html

CITED BY 3

	Paul P. Sotiriadis , Anantha P. Chandrakasan, A bus energy model for deep submicron technology, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.3, p.341-350, June 2002
	Paul Sotiriadis , Theodoros Konstantakopoulos , Anantha Chandrakasan, Analysis and implementation of charge recycling for deep sub-micron buses, Proceedings of the 2001 international symposium on Low power electronics and design, p.364-369, August 2001, Huntington Beach, California, United States
	Vasanth Venkatachalam , Michael Franz, Power reduction techniques for microprocessor systems, ACM Computing Surveys (CSUR), v.37 n.3, p.195-237, September 2005