A physical alpha-power law MOSFET model

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A physical alpha-power law MOSFET model

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 1999 international symposium on Low power electronics and design table of contents

San Diego, California, United States

Pages: 218 - 222

Year of Publication: 1999

ISBN:1-58113-133-X

Authors

Keith A. Bowman	Georgia Institute of Technology, Atlanta, GA
Blanca L. Austin	Georgia Institute of Technology, Atlanta, GA
John C. Eble	Compaq Corporation, Shrewsbury, MA
Xinghai Tang	Georgia Institute of Technology, Atlanta, GA
James D. Meindl	Georgia Institute of Technology, Atlanta, GA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

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ACM New York, NY, USA

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Downloads (6 Weeks): 22, Downloads (12 Months): 131, Citation Count: 1

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	T. Sakurai and A R. Newton, "Alpha-Power Law MOSFET Model and its Applications to CMOS Inverter Delay and Other Formulas," IEEE d. of Solid State Circuits, Vol. 25, No. 2, pp. 584-594, Apr. 1990.
	2	B. Austin, K. Bowman, Xinghai Tang, and J. D. Meindl, "A Low Power Transregional MOSFET Model for Complete Power-Delay Analysis of CMOS Gigascale Integration (GSI)," Proc. of the 11th Annual IEEE Intl. ASIC Conf., pp. 125-129, Sept. 1998.
	3	S. L. Garverick and C. G. Sodini, "A Simple Model for Scaled MOS Transistors that Includes Field- Dependent Mobility," IEEE J. Solid-State Circuits, Volo SC-22, No. 1, pp. 111-114, Feb. 1987.
	4	B. T. Murphy, "Unified Field-Effect Transistor Theory Including Velocity Saturation," IEEE J. Solid- State Circuits, Vol. SC-15, pp. 325-327, June 1980.
	5	W. Shockley, "A unipolar field effect transistor," Proc. IRE, Vol. 40, pp. 1365-1376, Nov. 1952.
	6	A. Agrawal, V. K. De, and James D. Meindl, "Opportunities for Scaling FET's for Gigascale Integration (GSI)," Proc. of the 23ra ESSDERC, pp. 919-926, Sept. 1993.
	7	HSPICE User's Manual, Meta-Software, Inc., Mar. 1995.
	8	R. A. Chapman, C. C. Wei, D. A. Bell, S. Aur, G. A. Brown, and R. A. Haken, "0.5 Micron CMOS for High Performance at 3.3V," IEEE IEDM Tech. Dig., pp. 52-55, 1988.
	9	M. Bohr, S. U. Ahmed, L. Brigham, R. Chau, R. Gasser, R. Green, W. Hargrove, E. Lee, R. Natter, S. Thompson, K. Weldon, and S. Yang, "A High Performance 0.35gm Logic Technology for 3.3V and 2.5V Operation," iEEE 1EDM Tech. Dig., pp. 273- 276, 1994.
	10	Semiconductor Industry Association, "NTRS," 1997.