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MAELSTROM: efficient simulation-based synthesis for custom analog cells
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 36th annual ACM/IEEE Design Automation Conference table of contents
New Orleans, Louisiana, United States
Pages: 945 - 950  
Year of Publication: 1999
ISBN:1-58133-109-7
Authors
Michael Krasnicki  Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania
Rodney Phelps  Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania
Rob A. Rutenbar  Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania
L. Richard Carley  Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, Pennsylvania
Sponsors
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 1,   Downloads (12 Months): 22,   Citation Count: 25
Additional Information:

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
E. Ochotta, R.A. Rutenbar, L.R. Carley, "Synthesis of High-Performance Analog Circuits and ASTRX/OBLX," IEEE Trans. CAD, vol. 15, no. 3, March 1996.
 
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M. Degrauwe et al., "Towards an analog system design environment," IEEE JSSC, vol. sc-24, no. 3, June 1989.
 
5
H.Y. Koh, C.H. Sequin, and ER. Gray, "OPASYN: a compiler for MOS operational amplifiers," IEEE Trans. CAD, vol. 9, no. 2, Feb. 1990.
 
6
G. Gielen, et al., "Analog circuit design optimization based on symbolic simulation and simulated annealing," IEEE JSSC, vol. 25, June 1990.
 
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E C. Maulik, L. R. Carley, and R. A. Rutenbar, "Integer Programming Based Topology Selection of Cell Level Analog Circuits," IEEE Trans. CAD, vol. 14, no. 4, April 1995.
9
 
10
R. Harjani, R.A. Rutenbar and L.R. Carley, "OASYS: a framework for analog circuit synthesis," IEEE Trans. CAD, vol. 8, no. 12, Dec. 1989.
 
11
B.J. Sheu, et al., "A Knowledge-Based Approach to Analog IC Design," IEEE Trans. Circuits and Systems, CAS-35(2):256-258, 1988.
 
12
 
13
J. E Harvey, et al., "STAIC: An Interactive Framework for Synthesizing CMOS and BiCMOS Analog Circuits," IEEE Trans. CAD, Nov. 1992.
 
14
C. Makris and C. Toumazou, "Analog IC Design Automation Part II-- Automated Circuit Correction by Qualitative Reasoning," IEEE Trans. CAD, vol. 14, no. 2, Feb. 1995.
 
15
A. Torralba, J. Chavez and L. Franquelo, "FASY: A Fuzzy-Logic Based Tool for Analog Synthesis," IEEE Trans. CAD, vol. 15, no. 7, July 996.
 
16
G. Gielen, E Wambacq, and W. Sansen, "Symbolic ANalysis Methods and Applications for Analog Circuits: A Tutorial Overview, "Proc. IEEE, vol. 82, no. 2, Feb., 1990.
 
17
 
18
Q. Yu and C. Sechen, "A Unified Approach to the Approximate Symbolic Analysis of Large Analog Integrated Circuits," IEEE Trans. Circuits and Sys., vol. 43, no. 8, August 1996.
 
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20
S. Kirkpatrick, C.D. Gelatt, M.E Vecchi, "Optimization by simulated annealing," Science, vol. 220, no. 4598, 13 May 183.
 
21
L. T. Pillage and R.A. Rohrer, "Asymptotic Waveform Evaluation for Timing Analysis," IEEE Trans. CAD, vol. 9. no. 4, April 1990.
 
22
W. Nye, et al., "DELIGHT.SPICE: an optimization-based system for the design of integrated circuits," IEEE Trans. CAD, vol. 7, April 1988.
 
23
M. Krasnicki, "Generalized Analog Circuit Synthesis," M.S. Thesis, Dept. of ECE, Carnegie Mellon, Dec. 1997.
 
24
K. Nakamura and L.R. Carley, "A current-based positive-feedback technique for efficient cascode bootstrapping," Proc. VLSI Circuits Symposium, June 1991.
 
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CITED BY  25

Collaborative Colleagues:
Michael Krasnicki: colleagues
Rodney Phelps: colleagues
Rob A. Rutenbar: colleagues
L. Richard Carley: colleagues