| LISA—machine description language for cycle-accurate models of programmable DSP architectures |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
table of contents
New Orleans, Louisiana, United States
Pages: 933 - 938
Year of Publication: 1999
ISBN:1-58133-109-7
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Authors
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Stefan Pees
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Integrated Signal Processing Systems, Aachen University of Technology, Aachen, Germany
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Andreas Hoffmann
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Integrated Signal Processing Systems, Aachen University of Technology, Aachen, Germany
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Vojin Zivojnovic
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AXYS Design Automation, Inc., 135 Santa Louisa, Irvine, CA
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Heinrich Meyr
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Integrated Signal Processing Systems, Aachen University of Technology, Aachen, Germany
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| Bibliometrics |
Downloads (6 Weeks): 8, Downloads (12 Months): 59, Citation Count: 35
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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V. Zivojnovi~, S. Pees, and H. Meyr, "LISA -- machine description language and generic machine model for HW/SW co-design," in Proceedings of the IEEE Workshop on VLSI Signal Processing, (San Francisco), Oct. 1996.
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Texas Instruments, TMS320C62x/C67x CPU and Instruction Set Reference Guide, Mar. 1998.
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3
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J. Rowson, "Hardware/Software co-simulation," in Proc. of the A CM/IEEE Design Automation Conference (DA C), 1994.
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4
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David G. Bradlee , Robert R. Henry , Susan J. Eggers, The Marion system for retargetable instruction scheduling, Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation, p.229-240, June 24-28, 1991, Toronto, Ontario, Canada
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B. Rau, "VLIW compilation driven by a machine description database," in Proc. 2nd Code Generation Workshop, Leuven, Belgium, 1996.
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Mark R. Hartoog , James A. Rowson , Prakash D. Reddy , Soumya Desai , Douglas D. Dunlop , Edwin A. Harcourt , Neeti Khullar, Generation of software tools from processor descriptions for hardware/software codesign, Proceedings of the 34th annual conference on Design automation, p.303-306, June 09-13, 1997, Anaheim, California, United States
[doi> 10.1145/266021.266110]
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W. Geurts, D. Lanneer, et al., "Design of DSP systems with Chess/Checkers," in 2nd Int. Workshop on Code Generation for Embedded Processors, (Leuven), Mar. 1996.
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George Hadjiyiannis , Silvina Hanono , Srinivas Devadas, ISDL: an instruction set description language for retargetability, Proceedings of the 34th annual conference on Design automation, p.299-302, June 09-13, 1997, Anaheim, California, United States
[doi> 10.1145/266021.266108]
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10
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V. Kathail, M. Schlansker, and B. Rau, "HPL PlayDoh Architecture Specification: Version 1.0," in HP Laboratories Technical Report HPL-93-80, Mar. 1994.
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Ashok Halambi , Peter Grun , Vijay Ganesh , Asheesh Khare , Nikil Dutt , Alex Nicolau, EXPRESSION: a language for architecture exploration through compiler/simulator retargetability, Proceedings of the conference on Design, automation and test in Europe, p.100-es, January 1999, Munich, Germany
[doi> 10.1145/307418.307549]
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13
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S. Pees, V. 7.ivojnovid, A. Ropers, and H. Meyr, "Fast Simulation of the TI TMS 320C54x DSP," in Proc. Int. Conf. on Signal Processing Application and Technology (IC- SPAT), (San Diego), pp. 995-999, Sep. 1997.
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http :l/www. ert.rwth-aachen, de/lisa/lisa.html.
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CITED BY 35
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Alberto La Rosa , Luciano Lavagno , Claudio Passerone, A software development tool chain for a reconfigurable processor, Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, November 16-17, 2001, Atlanta, Georgia, USA
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Stefan Pees , Andreas Hoffmann , Heinrich Meyr, Retargeting of compiled simulators for digital signal processors using a machine description language, Proceedings of the conference on Design, automation and test in Europe, p.669-673, March 27-30, 2000, Paris, France
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Manish Vachharajani , Neil Vachharajani , David A. Penry , Jason A. Blome , David I. August, Microarchitectural exploration with Liberty, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
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Aimen Bouchhima , Iuliana Bacivarov , Wassim Youssef , Marius Bonaciu , Ahmed A. Jerraya, Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
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A. Hoffmann , A. Nohl , S. Pees , G. Braun , H. Meyr, Generating production quality software development tools using a machine description language, Proceedings of the conference on Design, automation and test in Europe, p.674-678, March 2001, Munich, Germany
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Andreas Hoffmann , Oliver Schliebusch , Achim Nohl , Gunnar Braun , Oliver Wahlen , Heinrich Meyr, A methodology for the design of application specific instruction set processors (ASIP) using the machine description language LISA, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
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Yuki Kobayashi , Shinsuke Kobayashi , Koji Okuda , Keishi Sakanushi , Yoshinori Takeuchi , Masaharu Imai, Synthesizable HDL generation method for configurable VLIW processors, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.842-845, January 27-30, 2004, Yokohama, Japan
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Manish Vachharajani , Neil Vachharajani , David A. Penry , Jason A. Blome , David I. August, The Liberty Simulation Environment, version 1.0, ACM SIGMETRICS Performance Evaluation Review, v.31 n.4, p.19-24, March 2004
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Maria Gabrani , Gero Dittmann , Andreas Döring , Andreas Herkersdorf , Patricia Sagmeister , Jan van Lunteren, Design methodology for a modular service-driven network processor architecture, Computer Networks: The International Journal of Computer and Telecommunications Networking, v.41 n.5, p.623-640, 5 April 2003
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David I. August , Sharad Malik , Li-Shiuan Peh , Vijay Pai , Manish Vachharajani , Paul Willmann, Achieving structural and composable modeling of complex systems, International Journal of Parallel Programming, v.33 n.2, p.81-101, June 2005
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Sanghyun Park , Eugene Earlie , Aviral Shrivastava , Alex Nicolau , Nikil Dutt , Yunheung Paek, Automatic generation of operation tables for fast exploration of bypasses in embedded processors, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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Manish Vachharajani , Neil Vachharajani , David A. Penry , Jason A. Blome , Sharad Malik , David I. August, The Liberty Simulation Environment: A deliberate approach to high-level system modeling, ACM Transactions on Computer Systems (TOCS), v.24 n.3, p.211-249, August 2006
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John Glossner , Daniel Iancu , Mayan Moudgill , Gary Nacer , Sanjay Jinturkar , Stuart Stanley , Michael Schulte, The sandbridge SB3011 platform, EURASIP Journal on Embedded Systems, v.2007 n.1, p.16-16, January 2007
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Jűrgen Teich , Ralph Weper , Dirk Fischer , Stefan Trinkert, A joined architecture/compiler design environment for ASIPs, Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems, p.26-33, November 17-19, 2000, San Jose, California, United States
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Edward K. Walters II , J. Eliot B. Moss , Trek Palmer , Timothy Richards , Charles C. Weems, CASL: A rapid-prototyping language for modern micro-architectures, Computer Languages, Systems and Structures, v.34 n.4, p.195-211, December, 2008
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B. Mei , B. Sutter , T. Aa , M. Wouters , A. Kanstein , S. Dupont, Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder, Journal of Signal Processing Systems, v.51 n.3, p.225-243, June 2008
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Rola Kassem , Mikaël Briday , Jean-Luc Béchennec , Yvon Trinquet , Guillaume Savaton, Instruction set simulator generation using HARMLESS, a new hardware architecture description language, Proceedings of the 2nd International Conference on Simulation Tools and Techniques, March 02-06, 2009, Rome, Italy
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