| Robust techniques for watermarking sequential circuit designs |
| Full text |
Pdf
(145 KB)
|
| Source
|
Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
table of contents
New Orleans, Louisiana, United States
Pages: 837 - 842
Year of Publication: 1999
ISBN:1-58133-109-7
|
|
Author
|
|
| Sponsors |
|
| Publisher |
|
| Bibliometrics |
Downloads (6 Weeks): 6, Downloads (12 Months): 20, Citation Count: 10
|
|
|
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
|
| |
2
|
|
| |
3
|
E. Charbon. Hierarchical watermarking in IC design. In Proc. Custom Integrated Circuit Conference, pages 295-298, Santa Clara, CA, May 1998.
|
| |
4
|
|
| |
5
|
E. M. Sentovich, K. J. Singh, L. Lavagno, C. Moon, R. Murgai, A. Saldanha, H. Savoj, P. R. Stephan, R. K. Brayton and A. Sangiovanni- Vincentelli. SIS: A system for sequential circuit synthesis. Technical report, U.C. Berkeley, May 1992.
|
| |
6
|
H. Cho, G.D. Hachtel, and F. Somenzi. Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 12(7):935-945, July 1993.
|
 |
7
|
Darko Kirovski , Yean-Yow Hwang , Miodrag Potkonjak , Jason Cong, Intellectual property protection by watermarking combinational logic synthesis solutions, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.194-198, November 08-12, 1998, San Jose, California, United States
[doi> 10.1145/288548.288609]
|
 |
8
|
John Lach , William H. Mangione-Smith , Miodrag Potkonjak, Signature hiding techniques for FPGA intellectual property protection, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.186-189, November 08-12, 1998, San Jose, California, United States
[doi> 10.1145/288548.288606]
|
| |
9
|
J.-K. Rho, G. Hachtel, F. Somenzi, and R. Jacoby. Exact and heuristic algorithms for the minimization of incompletely specified state machines. IEEE Transactions on Computer-Aided Design, 13(2): 167-177, February 1994.
|
| |
10
|
I. Torunoglu and E. Charbon. Watermarking-based copyright protection of sequential functions. In Proc. Custom Integrated Circuit Conference, Sa Diego, CA, May 1999.
|
CITED BY 10
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Darko Kirovski , David Liu , Jennifer Wong , Miodrag Potkonjak, Forensic engineering techniques for VLSI CAD tools, Proceedings of the 37th conference on Design automation, p.581-586, June 05-09, 2000, Los Angeles, California, United States
|
|
|
Adarsh K. Jain , Lin Yuan , Pushkin R. Pari , Gang Qu, Zero overhead watermarking technique for FPGA designs, Proceedings of the 13th ACM Great Lakes symposium on VLSI, April 28-29, 2003, Washington, D. C., USA
|
|
|
|
|
|
|
|