Hardware reuse at the behavioral level

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Hardware reuse at the behavioral level

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 36th annual ACM/IEEE Design Automation Conference table of contents

New Orleans, Louisiana, United States

Pages: 784 - 789

Year of Publication: 1999

ISBN:1-58133-109-7

Authors

Patrick Schaumont	IMEC vzw, Kapeldreef 75, B-3001 Leuven Belgium
Radim Cmar	IMEC vzw, Kapeldreef 75, B-3001 Leuven Belgium
Serge Vernalde	IMEC vzw, Kapeldreef 75, B-3001 Leuven Belgium
Marc Engels	IMEC vzw, Kapeldreef 75, B-3001 Leuven Belgium
Ivo Bolsens	IMEC vzw, Kapeldreef 75, B-3001 Leuven Belgium

Sponsors

EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 9, Citation Count: 9

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	P. J. Ashenden , P. A. Wilsey , D. E. Martin, Reuse Through Genericity in SUAVE, Proceedings of the 1997 VHDL International User's Forum (VIUF '97), p.170, October 19-22, 1997
	2	B. Djafri , J. Benzakki, OOVHDL: Object Oriented VHDL, Proceedings of the 1997 VHDL International User's Forum (VIUF '97), p.54, October 19-22, 1997
	3	Erich Gamma , Richard Helm , Ralph Johnson , John Vlissides, Design patterns: elements of reusable object-oriented software, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1995
	4	Rajesh K. Gupta , Stan Y. Liao, Using a Programming Language for Digital System Design, IEEE Design & Test, v.14 n.2, p.72-80, April 1997 [doi>10.1109/54.587745]
	5	Ocapi Homepage. http://www.imec.be/ocapi.
	6	G. Lehmann , K. Müller-Glaser , B. Wunder, A VHDL reuse workbench, Proceedings of the conference on European design automation, p.412-417, September 1996, Geneva, Switzerland
	7	G. Martin, Design methodologies for system level IP, Proceedings of the conference on Design, automation and test in Europe, p.286-289, February 23-26, 1998, Le Palais des Congrés de Paris, France
	8	Patrick Schaumont , Serge Vernalde , Luc Rijnders , Marc Engels , Ivo Bolsens, A programming environment for the design of complex high speed ASICs, Proceedings of the 35th annual conference on Design automation, p.315-320, June 15-19, 1998, San Francisco, California, United States [doi>10.1145/277044.277135]
	9	C. Schneider , W. Ecker, Stepwise refinement of behavioral VHDL specifications by separation of synchronization and functionality, Proceedings of the conference on European design automation, p.509-514, September 1996, Geneva, Switzerland
	10	G. Schumacher , W. Nebel, Object-oriented modelling of parallel hardware systems, Proceedings of the conference on Design, automation and test in Europe, p.234-241, February 23-26, 1998, Le Palais des Congrés de Paris, France
	11	S. Vercauteren and Bill Lin. Hardware/software Communication and System Integration for Embedded Architectures. Design Automation o/Embedded Systems, Kluwer Academic Publishers, 2:1-24, 1997.
	12	C. Weiler, U. Kebschull, and W. Rosenstiel. C++ base classes for specification, simulation and partitioning of a hardware/software system. In Proc. ASP-DA C 1995, CHDL 1.995, VLSI 1995, pages 777-784.

CITED BY 9

	Pontus Åström , Stefan Johansson , Peter Nilsson, Application of Software design patterns to DSP library design, Proceedings of the 14th international symposium on Systems synthesis, September 30-October 03, 2001, Montréal, P.Q., Canada
	Seapahn Meguerdichian , Farinaz Koushanfar , Advait Morge , Dusan Petranovic , Miodrag Potkonjak, MetaCores: design and optimization techniques, Proceedings of the 38th conference on Design automation, p.585-590, June 2001, Las Vegas, Nevada, United States
	Jianwen Zhu , Daniel D. Gajski, Compiling SpecC for simulation, Proceedings of the 2001 conference on Asia South Pacific design automation, p.57-62, January 2001, Yokohama, Japan
	J. Zhu, MetaRTL: raising the abstraction level of RTL design, Proceedings of the conference on Design, automation and test in Europe, p.71-76, March 2001, Munich, Germany
	Diederik Verkest , Joachim Kunkel , Frank Schirrmeister, System level design using C++, Proceedings of the conference on Design, automation and test in Europe, p.74-83, March 27-30, 2000, Paris, France
	Flávio R. Wagner , Wander O. Cesário , Luigi Carro , Ahmed A. Jerraya, Strategies for the integration of hardware and software IP components in embedded systems-on-chip, Integration, the VLSI Journal, v.37 n.4, p.223-252, September 2004
	Tom Van Court , Martin C. Herbordt, Families of FPGA-based accelerators for approximate string matching, Microprocessors & Microsystems, v.31 n.2, p.135-145, March, 2007
	Flávio R. Wagner , Wander Cesário , Ahmed A. Jerraya, Hardware/software IP integration using the ROSES design environment, ACM Transactions on Embedded Computing Systems (TECS), v.6 n.3, p.17-es, July 2007
	Jianwen Zhu , Wai Sum Mong, Specification of Non-Functional Intellectual Property Components, Proceedings of the conference on Design, Automation and Test in Europe, p.10456, March 03-07, 2003