Reconfigurable computing

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Reconfigurable computing: what, why, and implications for design automation

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 36th annual ACM/IEEE Design Automation Conference table of contents

New Orleans, Louisiana, United States

Pages: 610 - 615

Year of Publication: 1999

ISBN:1-58133-109-7

Authors

André DeHon	Berkeley Reconfigurable, Architectures, Software and Systems, Computer Science Division, University of California at Berkeley, Berkeley, CA
John Wawrzynek	Berkeley Reconfigurable, Architectures, Software and Systems, Computer Science Division, University of California at Berkeley, Berkeley, CA

Sponsors

EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 101, Citation Count: 27

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	3	Andre DeHon, Reconfigurable Architectures for General-Purpose Computing, Massachusetts Institute of Technology, Cambridge, MA, 1996
	4	Andr6 DeHon. Comparing Computing Machines. In Configurable Computing: Technology and Applications, volume 3526 of Proceedings of SHE. SPIE, November 1998. <http ://www. cs .berkeley. edu/projects/ brass/documents/ccmpare spie98.ps.gz>.
	5	J. R. Hauser , J. Wawrzynek, Garp: a MIPS processor with a reconfigurable coprocessor, Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines, p.12, April 16-18, 1997
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	11	Jean E. Vuillemin , Patrice Bertin , Didier Roncin , Mark Shand , Hervé H. Touati , Philippe Boucard, Programmable active memories: reconfigurable systems come of age, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.4 n.1, p.56-69, March 1996 [doi>10.1109/92.486081]

CITED BY 27

	Masakazu Yamashina , Masato Motomura, Reconfigurable computing: its concept and a practical embodiment using newly developed dynamically reconfigurable logic (DRL) LSI: invited talk, Proceedings of the 2000 conference on Asia South Pacific design automation, p.329-332, January 2000, Yokohama, Japan
	Kia Bazargan , Seda Ogrenci , Majid Sarrafzadeh, Integrating scheduling and physical design into a coherent compilation cycle for reconfigurable computing architectures, Proceedings of the 38th conference on Design automation, p.635-640, June 2001, Las Vegas, Nevada, United States
	Ingrid Verbauwhede , M.-C. Frank Chang, Reconfigurable interconnect for next generation systems, Proceedings of the 2002 international workshop on System-level interconnect prediction, April 06-07, 2002, San Diego, California, USA
	Frederik Vermeulen , Francky Catthoor , Lode Nachtergaele , Diederik Verkest , Hugo De Man, Power-efficient flexible processor architecture for embedded applications, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.3, p.376-385, June 2003
	Jinghuan Chen , Jaekyun Moon , Kia Bazargan, A reconfigurable FPGA-based readback signal generator for hard-drive read channel simulator, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Patrick Schaumont , Ingrid Verbauwhede , Kurt Keutzer , Majid Sarrafzadeh, A quick safari through the reconfiguration jungle, Proceedings of the 38th conference on Design automation, p.172-177, June 2001, Las Vegas, Nevada, United States
	F. Vermeulen , F. Catthoor , D. Verkest , H. De Man, Extended design reuse trade-offs in hardware-software architecture mapping, Proceedings of the eighth international workshop on Hardware/software codesign, p.103-107, May 2000, San Diego, California, United States
	W. O. Cesário , Z. Sugar , I. Moussa , A. A. Jerraya, Efficient integration of behavioral synthesis within existing design flows, Proceedings of the 13th international symposium on System synthesis, September 20-22, 2000, Madrid, Spain
	F. Vermeulen , L. Nachtergaele , F. Catthoor , D. Verkest , H. De Man, Flexible hardware acceleration for multimedia oriented microprocessors, Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture, p.171-177, December 2000, Monterey, California, United States
	K. Masselos , A. Pelkonen , M. Cupak , S. Blionas, Realization of wireless multimedia communication systems on reconfigurable platforms, Journal of Systems Architecture: the EUROMICRO Journal, v.49 n.4-6, p.155-175, September 2003
	Christian Siemers , Volker Winterstein, The Universal Configurable Block/Machine—An Approach for a Configurable SoC-Architecture, The Journal of Supercomputing, v.26 n.3, p.309-331, November 2003
	André DeHon, Unifying mesh- and tree-based programmable interconnect, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.10, p.1051-1065, October 2004
	Kiarash Bazargan , Ryan Kastner , Majid Sarrafzadeh, Fast Template Placement for Reconfigurable Computing Systems, IEEE Design & Test, v.17 n.1, p.68-83, January 2000
	Ingrid Verbauwhede , Patrick Schaumont, The happy marriage of architecture and application in next-generation reconfigurable systems, Proceedings of the 1st conference on Computing frontiers, April 14-16, 2004, Ischia, Italy
	A. C. Zawada , N. L. Seed , P. A. Ivey, Continuous and high coverage self-testing of dynamically re-configurable systems, Parallel Computing, v.28 n.7-8, p.1155-1178, August 2002
	Patrick Lysaght , P. A. Subrahmanyam, Guest Editors' Introduction: Advances in Configurable Computing, IEEE Design & Test, v.22 n.2, p.85-89, March 2005
	Sebastian Wallner, A configurable system-on-chip architecture for embedded and real-time applications: concepts, design and realization, Journal of Systems Architecture: the EUROMICRO Journal, v.51 n.6-7, p.350-367, June-July 2005
	Alireza Shoa , Shahram Shirani, Run-time reconfigurable systems for digital signal processing applications: a survey, Journal of VLSI Signal Processing Systems, v.39 n.3, p.213-235, March 2005
	Soheil Ghiasi , Majid Sarrafzadeh, Optimal reconfiguration sequence management, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
	Krishna N. Vikram , Vinita Vasudevan, Mapping data-parallel tasks onto partially reconfigurable hybrid processor architectures, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.14 n.9, p.1010-1023, September 2006
	Cid C. de Souza , Andre M. Lima , Guido Araujo , Nahri B. Moreano, The datapath merging problem in reconfigurable systems: Complexity, dual bounds and heuristic evaluation, Journal of Experimental Algorithmics (JEA), 10, 2005
	Shouling He , Xuping Xu, Hardware simulation of an adaptive control algorithm, Proceedings of the 18th conference on Proceedings of the 18th IASTED International Conference: modelling and simulation, p.102-107, May 30-June 01, 2007, Montreal, Canada
	Takao Toi , Noritsugu Nakamura , Yoshinosuke Kato , Toru Awashima , Kazutoshi Wakabayashi , Li Jing, High-level synthesis challenges and solutions for a dynamically reconfigurable processor, Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, November 05-09, 2006, San Jose, California
	Stephen Coe , Shawki Areibi , Medhat Moussa, A hardware Memetic accelerator for VLSI circuit partitioning, Computers and Electrical Engineering, v.33 n.4, p.233-248, July, 2007
	Alireza Shoa , Shahram Shirani, Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey, Journal of VLSI Signal Processing Systems, v.39 n.3, p.213-235, March 2005
	Nei-Chiung Perng , Jian-Jia Chen , Tei-Wei Kuo, The minimization of hardware size in reconfigurable embedded platforms, Proceedings of the 2008 ACM symposium on Applied computing, March 16-20, 2008, Fortaleza, Ceara, Brazil
	Marcos R. Boschetti , Ivan S. Silva , Sergio Bampi, A Run-Time Reconfigurable Datapath Architecture for Image Processing Applications, Proceedings of the conference on Design, automation and test in Europe, p.30242, February 16-20, 2004