Comparing RTL and behavioral design methodologies in the case of a 2M-transistor ATM shaper

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Comparing RTL and behavioral design methodologies in the case of a 2M-transistor ATM shaper

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 36th annual ACM/IEEE Design Automation Conference table of contents

New Orleans, Louisiana, United States

Pages: 598 - 603

Year of Publication: 1999

ISBN:1-58133-109-7

Authors

Imed Moussa	TIMA laboratory, 46 Av. Felix Viallet 38031 Grenoble France
Zoltan Sugar	TIMA laboratory, 46 Av. Felix Viallet 38031 Grenoble France
Rodolph Suescun	AREXSYS, Grenoble France
Mario Diaz-Nava	STMicroelectronics, 850 rue Jean Monet 38921 Crolles France
Marco Pavesi	Italtel, 20019 Settimo Milanese Italy
Salvatore Crudo	Italtel, 20019 Settimo Milanese Italy
Luca Gazi	Italtel, 20019 Settimo Milanese Italy
Ahmed Amine Jerraya	TIMA laboratory, 46 Av. Felix Viallet 38031 Grenoble France

Sponsors

EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 12, Citation Count: 2

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	2	David C. Ku , Giovanni De Micheli, High level synthesis of ASICs under timing and synchronization constraints, Kluwer Academic Publishers, Norwell, MA, 1992
	3	E. Berrebi , P. Kission , S. Vernalde , S. De Troch , J. C. Herluison , J. Fréhel , A. A. Jerraya , I. Bolsens, Combined control flow dominated and data flow dominated high-level synthesis, Proceedings of the 33rd annual conference on Design automation, p.573-578, June 03-07, 1996, Las Vegas, Nevada, United States [doi>10.1145/240518.240627]
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	6	Mike Tien-Chien Lee , Yu-Chin Hsu , Ben Chen , Masahiro Fujita, Domain-specific high-level modeling and synthesis for ATM switch design using VHDL, Proceedings of the 33rd annual conference on Design automation, p.585-590, June 03-07, 1996, Las Vegas, Nevada, United States [doi>10.1145/240518.240629]
	7	The ATM Forum Technical Committee. Traffic management specification v4.0. af-tm-oo56.000 Letter Ballot, April 1996.
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	11	Ahmed Amine Jerraya , Polen Kission , Maher Rahmouni, Behavioral Synthesis and Component Reuse with VHDL, Kluwer Academic Publishers, Norwell, MA, 1996
	12	Reinaldo A. Bergamaschi, Productivity issues in high-level design: are tools solving the real problems?, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.674-677, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217609]

CITED BY 2

	W. O. Cesário , Z. Sugar , I. Moussa , A. A. Jerraya, Efficient integration of behavioral synthesis within existing design flows, Proceedings of the 13th international symposium on System synthesis, September 20-22, 2000, Madrid, Spain
	Guillaume Savaton , Emmanuel Casseau , Eric Martin, Design of a flexible 2-D discrete wavelet transform IP core for JPEG2000 image coding in embedded imaging systems, Signal Processing, v.86 n.7, p.1375-1399, July 2006