Enhancing simulation with BDDs and ATPG

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Enhancing simulation with BDDs and ATPG

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 36th annual ACM/IEEE Design Automation Conference table of contents

New Orleans, Louisiana, United States

Pages: 385 - 390

Year of Publication: 1999

ISBN:1-58133-109-7

Authors

Malay K. Ganai	Electrical and Computer Engineering, The University of Texas at Austin
Adnan Aziz	Electrical and Computer Engineering, The University of Texas at Austin
Andreas Kuehlmann	IBM Thomas J. Watson Research Center, Yorktown Heights, NY

Sponsors

EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 8, Citation Count: 21

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 21

	Shuo Sheng , Koichiro Takayama , Michael S. Hsiao, Effective safety property checking using simulation-based sequential ATPG, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Chris Wilson , David L. Dill, Reliable verification using symbolic simulation with scalar values, Proceedings of the 37th conference on Design automation, p.124-129, June 05-09, 2000, Los Angeles, California, United States
	Praveen Yalagandula , Vigyan Singhal , Adnan Aziz, Automatic lighthouse generation for directed state space search, Proceedings of the conference on Design, automation and test in Europe, p.237-242, March 27-30, 2000, Paris, France
	C. Norris Ip, Simulation coverage enhancement using test stimulus transformation, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Pei Hsin Ho , Thomas Shiple , Kevin Harer , James Kukula , Robert Damiano , Valeria Bertacco , Jerry Taylor , Jiang Long, Smart simulation using collaborative formal and simulation engines, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Malay K. Ganai , Adnan Aziz, Rarity based guided state space search, Proceedings of the 11th Great Lakes symposium on VLSI, p.97-102, March 2001, West Lafayette, Indiana, United States
	Chia-Chih Yen , Jing-Yang Jou , Kuang-Chien Chen, A Divide-and-Conquer-Based Algorithm for Automatic Simulation Vector Generation, IEEE Design & Test, v.21 n.2, p.111-120, March 2004
	Yu-Chin Hsu , Bassam Tabbara , Yirng-An Chen , Furshing Tsai, Advanced techniques for RTL debugging, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Zhihong Zeng , Kesava R. Talupuru , Maciej Ciesielski, Functional test generation based on word-level SAT, Journal of Systems Architecture: the EUROMICRO Journal, v.51 n.8, p.488-511, August 2005
	R. M. Gott , J. R. Baumgartner , P. Roessler , S. I. Joe, Functional formal verification on designs of pSeries microprocessors and communication subsystems, IBM Journal of Research and Development, v.49 n.4/5, p.565-580, July 2005
	Francesco Bruschi , Fabrizio Ferrandi , Donatella Sciuto, A framework for the functional verification of systemC models, International Journal of Parallel Programming, v.33 n.6, p.667-695, December 2005
	Yu-Chin Hsu , Furshing Tsai , Wells Jong , Ying-Tsai Chang, Visibility enhancement for silicon debug, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
	Peter M. Maurer, Using conjugate symmetries to enhance gate-level simulations, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
	Smitha Shyam , Valeria Bertacco, Distance-guided hybrid verification with GUIDO, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
	Ming Zhu , Jinian Bian , Weimin Wu, A novel collaborative scheme of simulation and model checking for system properties verification, Computers in Industry, v.57 n.8, p.752-757, December 2006
	Rupak Majumdar , Koushik Sen, Hybrid Concolic Testing, Proceedings of the 29th International Conference on Software Engineering, p.416-426, May 20-26, 2007
	Malay K. Ganai , Adnan Aziz, Improved SAT-based Bounded Reachability Analysis, Proceedings of the 2002 conference on Asia South Pacific design automation/VLSI Design, p.729, January 07-11, 2002
	Chia-Chih Yen , Jing-Yang Jou, An Optimum Algorithm for Compacting Error Traces for Efficient Design Error Debugging, IEEE Transactions on Computers, v.55 n.11, p.1356-1366, November 2006
	Praveen Tiwari , Raj S. Mitra, Hybrid Verification of Protocol Bridges, IEEE Design & Test, v.24 n.2, p.124-131, March 2007
	Qingwei Wu , Michael S. Hsiao, A New Simulation-Based Property Checking Algorithm Based on Partitioned Alternative Search Space Traversal, IEEE Transactions on Computers, v.55 n.11, p.1325-1334, November 2006
	Jayanta Bhadra , Magdy S. Abadir , Li-C. Wang , Sandip Ray, A Survey of Hybrid Techniques for Functional Verification, IEEE Design & Test, v.24 n.2, p.112-122, March 2007