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EXPRESSION: a language for architecture exploration through compiler/simulator retargetability
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Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents
Munich, Germany
Article No. 100  
Year of Publication: 1999
ISBN:1-58113-121-6
Authors
Ashok Halambi  Department of Information and Computer Science, University of California, Irvine, CA
Peter Grun  Department of Information and Computer Science, University of California, Irvine, CA
Vijay Ganesh  Department of Information and Computer Science, University of California, Irvine, CA
Asheesh Khare  Department of Information and Computer Science, University of California, Irvine, CA
Nikil Dutt  Department of Information and Computer Science, University of California, Irvine, CA
Alex Nicolau  Department of Information and Computer Science, University of California, Irvine, CA
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 14,   Downloads (12 Months): 47,   Citation Count: 92
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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[1] G. Goosens et al. CHESS: Retargetable code generation for embedded DSP processors. In Code Generation for Embedded Processors. Kluwer, 1997.
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[3] H. Yasuura et al. A programming language for processor based embedded systems. In Proc. APCHDL, 1998.
 
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[5] P. Paulin et al. FlexWare: A flexible firmware development environment for embedded systems. In Proc. Dagstuhl Code Generation Workshop, 1994.
 
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[7] V. Zivojnovic et al. LISA - machine description language and generic machine model for HW/SW co-design. In IEEE Workshop on VLSI Signal Processing, 1996.
 
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[8] M. Freericks. The nML machine description formalism. Technical Report TR SMIMP/DIST/08, TU Berlin CS Dept., 1993.
 
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[10] P. Grun, A. Halambi, A. Khare, V. Ganesh, N. Dutt, and A. Nicolau. EXPRESSION: An ADL for system level design exploration. Technical Report TR 98-29, University Of California, Irvine, 1998.
 
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[11] J. Gyllenhaal. A machine description language for compilation. Master's thesis, Dept. of EE, UIUC, IL., 1994.
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[13] R. Leupers and P. Marwedel. Retargetable code generation based on structural processor descriptions. Design Automation for Embedded Systems, 3(1), 1998.
 
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[14] MOTOROLA Inc. DSP56000 24-Bit Digital Signal Processor Family Manual, 1995.
 
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[17] TEXAS INSTRUMENTS. TMS320C62x/C67x CPU and Instruction Set Reference Guide, 1998.
 
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[18] Trimaran Release: http://www.trimaran.org. The MDES User Manual, 1998.

CITED BY  93

Collaborative Colleagues:
Ashok Halambi: colleagues
Peter Grun: colleagues
Vijay Ganesh: colleagues
Asheesh Khare: colleagues
Nikil Dutt: colleagues
Alex Nicolau: colleagues