A power estimation model for high-speed CMOS A/D converters

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A power estimation model for high-speed CMOS A/D converters

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Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents

Munich, Germany

Article No. 85

Year of Publication: 1999

ISBN:1-58113-121-6

Authors

E. Lauwers	Department of Electrical Engineering, Katholieke Universiteit Leuven, Belgium
G. Gielen	Department of Electrical Engineering, Katholieke Universiteit Leuven, Belgium

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 4, Downloads (12 Months): 26, Citation Count: 5

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	[1] A.G. Venes, R.J. van de Plassche, "An 80-mW, 8-b CMOS Folding A/D Converter with Distributed Track-and-Hold Preprocessing", Journal of Solid-State Circuits, pp. 1846-1853, December 1996.
	2	[2] F. Goodenough, "ADC's move to cut power dissipation", Electronic Design, January 9, 1995.
	3	[3] M. Pelgrom, A. Duinmaijer, A. Welbers "Matching Properties of MOS Transistors", IEEE Journal of Solid-State Circuits, pp. 1433-1439, October 1989.
	4	[4] P. Kinget, "Analog VLSI integration of parallel signal processing systems", PhD thesis, Katholieke Universiteit Leuven, May, 1996.
	5	[5] R.J. van de Plassche, "Integrated Analog-to-Digital and Digital-to-Analog converters", July 1993.
	6	[6] T.B. Cho, P.R. Gray, "A 10 b, 20 Msample/s, 35mW Pipeline A/D Converter", Journal of Solid-State Circuits, pp. 166-172, March 1995.
	7	[7] W.-C. Song, H.-W. Choi, S.-U. Kwak, and B.-S. Song, "A 10 b 20 Msample/s Low-Power CMOS ADC", Journal of Solid-State Circuits, pp. 514-521, May 1995.
	8	[8] Masao Ito et.al., "A 10 b 20 MS/s 3V Supply CMOS A/D Converter", Journal of Solid-State Circuits, pp. 1531-1536, December 1994.
	9	[9] J. Ingino Jr., B. Wooley, "A Continuously-Calibrated 10Msample/s 12b 3.3V ADC", ISSCC Digest of Technical Papers, pp. 144-145, Feb. 1998.
	10	[10] S. Donnay, G. Gielen, W. Sansen, "High-Level analog/digital partitioning in low-power signal processing applications", 7th international workshop on power and timing modeling, optimization and simulation (PATMOS), Louvain-la-Neuve, Belgium, Sep.8-10, 1997, pp. 47-56.
	11	[11] I. Mehr, D. Dalton, "A 500 Msample/s 6-Bit Nyquist Rate ADC for Disk Drive Read Channel Applications", proceedings of ESSCIRC '98, pp. 236-239.

CITED BY 5

	Martin Vogels , Georges Gielen, Architectural selection of A/D converters, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	Erik Lauwers , Georges Gielen, ACTIF: a high-level power estimation tool for analog continuous-time filters, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Georges Gielen , Willy Sansen , Francky Leyn , Martin Vogels , Erik Lauwers, Regression Criteria and Their Application in Different Modeling Cases, Analog Integrated Circuits and Signal Processing, v.37 n.2, p.113-122, November 2003
	Erik Lauwers , Georges Gielen, Power estimation methods for analog circuits for architectural exploration of integrated systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.2, p.155-162, April 2002
	Martin Vogels , Georges Gielen, Figure of Merit Based Selection of A/D Converters, Proceedings of the conference on Design, Automation and Test in Europe, p.11090, March 03-07, 2003