C-based synthesis experiences with a behavior synthesizer, “cyber”

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C-based synthesis experiences with a behavior synthesizer, “cyber”

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Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents

Munich, Germany

Article No. 83

Year of Publication: 1999

ISBN:1-58113-121-6

Author

Kazutoshi Wakabayashi

C&C Media Research Laboratories, NEC Corp., Japan

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 22, Citation Count: 12

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cited by index terms collaborative colleagues

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CITED BY 12

	Takashi Kambe , Akihisa Yamada , Koichi Nishida , Kazuhisa Okada , Mitsuhisa Ohnishi , Andrew Kay , Paul Boca , Vince Zammit , Toshio Nomura, A C-based synthesis system, Bach, and its application (invited talk), Proceedings of the 2001 conference on Asia South Pacific design automation, p.151-155, January 2001, Yokohama, Japan
	Luc Séméria , Koichi Sato , Giovanni De Micheli, Resolution of dynamic memory allocation and pointers for the behavioral synthesis form C, Proceedings of the conference on Design, automation and test in Europe, p.312-319, March 27-30, 2000, Paris, France
	Nobuhiro Doi , Takashi Horiyama , Masaki Nakanishi , Shinji Kimura, Minimization of fractional wordlength on fixed-point conversion for high-level synthesis, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.80-85, January 27-30, 2004, Yokohama, Japan
	Sumit Gupta , Rajesh Kumar Gupta , Nikil D. Dutt , Alexandru Nicolau, Coordinated parallelizing compiler optimizations and high-level synthesis, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.9 n.4, p.441-470, October 2004
	Luc Séméria , Koichi Sato , Giovanni De Micheli, Synthesis of hardware models in C with pointers and complex data structures, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.6, p.743-756, 12/1/2001
	Yoichi Yuyama , Masao Aramoto , Kazutoshi Kobayashi , Hidetoshi Onodera, An SoC architecture and its design methodology using unifunctional heterogeneous processor array, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.737-742, January 27-30, 2004, Yokohama, Japan
	Girish Venkataramani , Tiberiu Chelcea , Seth Copen Goldstein , Tobias Bjerregaard, SOMA: a tool for synthesizing and optimizing memory accesses in ASICs, Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 19-21, 2005, Jersey City, NJ, USA
	Chao Huang , Srivaths Ravi , Anand Raghunathan , Niraj K. Jha, Generation of heterogeneous distributed architectures for memory-intensive applications through high-level synthesis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.15 n.11, p.1191-1204, November 2007
	Takao Toi , Noritsugu Nakamura , Yoshinosuke Kato , Toru Awashima , Kazutoshi Wakabayashi , Li Jing, High-level synthesis challenges and solutions for a dynamically reconfigurable processor, Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, November 05-09, 2006, San Jose, California
	Chao Huang , S. Ravi , A. Raghunathan , N. K. Jha, High-level synthesis using computation-unit integrated memories, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.783-790, November 07-11, 2004
	Aarti Gupta , Albert E. Casavant , Pranav Ashar , Akira Mukaiyama , Kazutoshi Wakabayashi , X. G. (Sean) Liu, Property-Specific Testbench Generation for Guided Simulation, Proceedings of the 2002 conference on Asia South Pacific design automation/VLSI Design, p.524, January 07-11, 2002
	Stephen A. Edwards, The Challenges of Hardware Synthesis from C-Like Languages, Proceedings of the conference on Design, Automation and Test in Europe, p.66-67, March 07-11, 2005