| Efficient management of memory hierarchies in embedded DRAM systems |
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International Conference on Supercomputing
archive
Proceedings of the 13th international conference on Supercomputing
table of contents
Rhodes, Greece
Pages: 464 - 473
Year of Publication: 1999
ISBN:1-58113-164-X
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Authors
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Ashley Saulsbury
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Sun Microsystems Laboratories, 901 San Antonio Road, Palo Alto, CA
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Su-Jaen Huang
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Sun Microsystems Laboratories, 901 San Antonio Road, Palo Alto, CA
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Fredrik Dahlgren
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Dept. of Computer Engineering, Chalmers University of Technology, SE-413 05 Gothenburg, Sweden
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| Bibliometrics |
Downloads (6 Weeks): 3, Downloads (12 Months): 14, Citation Count: 1
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Richard Fromm , Stylianos Perissakis , Neal Cardwell , Christoforos Kozyrakis , Bruce McGaughy , David Patterson , Tom Anderson , Katherine Yelick, The energy efficiency of IRAM architectures, Proceedings of the 24th annual international symposium on Computer architecture, p.327-337, June 01-04, 1997, Denver, Colorado, United States
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P.M. Kogge, "EXECUBE- A New Architecture for Scalable MPPs," in 1994 International Conference on Parallel Processing, 1994.
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H. Koike et al., "A 30ns 64Mb DRAM with Built-in Self-Test and Repair Function," in Proceedings of International Solid- State Circuits Conference, p150, 1992.
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M.G. Nealon, "C4: A Legacy Technology for the Future" in IBM Micronews, Volume 2, Number 4, Fourth Quarter, 1996. h.{yp://~.chips.ibm, com/techlib/micronews/vol2 no4/
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David Patterson , Thomas Anderson , Neal Cardwell , Richard Fromm , Kimberly Keeton , Christoforos Kozyrakis , Randi Thomas , Katherine Yelick, A Case for Intelligent RAM, IEEE Micro, v.17 n.2, p.34-44, March 1997
[doi> 10.1109/40.592312]
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Ashley Saulsbury , Fong Pong , Andreas Nowatzyk, Missing the memory wall: the case for processor/memory integration, Proceedings of the 23rd annual international symposium on Computer architecture, p.90-101, May 22-24, 1996, Philadelphia, Pennsylvania, United States
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Shimizu et al., "A Multimedia 32b RiSC Microprocessor with 16Mb DRAM" in International Solid State Circuit Conjkrence, February 1996, pp.216-217. Mitsubishi M32R/D
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H. Stoller, "Multi-chip Modules: A Technology in Your Future?;' in IBM Micronews, Vol. 2, No 4, Q4, 1996. http:// www. chips, ibm. com/te_chlib/micro_n_ews/vol2 no4/
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IBM Microelectronics, "Blue Logic SA-27E ASIC". www. chips.ibm.eom/news/1999/sa27elsa27e.pdf
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T. Yamauchi, L. Hammond and K. Olukotun, "A Single Chip Mulfiprocessor Integrated with DRAM", in Workshop on Mixing Logic and DRAM preceding the 24th International Symposium on Computer Architecture, June 1997.
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INDEX TERMS
Primary Classification:
B.
Hardware
B.3
MEMORY STRUCTURES
B.3.1
Semiconductor Memories
Subjects:
Dynamic memory (DRAM)
Additional Classification:
C.
Computer Systems Organization
C.5
COMPUTER SYSTEM IMPLEMENTATION
C.5.1
Large and Medium ("Mainframe") Computers
Subjects:
Super (very large) computers
K.
Computing Milieux
K.6
MANAGEMENT OF COMPUTING AND INFORMATION SYSTEMS
K.6.2
Installation Management
Subjects:
Benchmarks
General Terms:
Design,
Experimentation,
Measurement,
Performance,
Standardization,
Theory
Keywords:
COMA,
DRAM,
cache,
latency,
memory hierarchy,
processor
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