A unified signal transition graph model for asynchronous control circuit synthesis

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

A unified signal transition graph model for asynchronous control circuit synthesis

Full text

Pdf (1.19 MB)

Source

International Conference on Computer Aided Design archive
Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design table of contents

Santa Clara, California, United States

Pages: 104 - 111

Year of Publication: 1992

ISBN:0-89791-540-2

Authors

Alexandre Yakovlev	Dept. of Computing Science, The University Newcastle upon Tyne, NE1 7RU, UK
Luciano Lavagno	Dept. of Electrical Engineering, University of California, Berkeley, CA
Alberto Sangiovanni-Vincentelli	Dept. of Electrical Engineering, University of California, Berkeley, CA

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 12, Citation Count: 0

Additional Information:

references index terms collaborative colleagues

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	E. Best and K. Voss. Free choice systems have home states. Acta lnformatica, 21:89-100,1984l
	2	T.A. Chu. Symhesis of self-timed conu'ol circuits from graphs: an example. In l Proceedings of the International Conference on Computer Design, pages 565- 571,1986.
	3	V. I. Varshavsky et al. Self.timed Control of Concurrent Processes. Kluwer Academic Publisher, 1990. (Russian edition: 1986).
	4	Robert M. Keller, A Fundamental Tehoerem of Asynchronous Parallel Computation, Proceedings of the Sagamore Computer Conference on Parallel Processing, p.102-112, August 20-23, 1974
	5	M. A. Kishinevsky, A. Y. Kondratyev, A. R. Taubin, and V. I. Varshavsky. On serf-timed behavior verification. In ACM Intl. Workshop on 7"uvdng Issues in the Specification and Synthesis of Digital Systems, 1992.
	6	L. Lavagno , K. Keutzer , A. Sangiovanni-Vincentelli, Algorithms for synthesis of hazard-free asynchronous circuits, Proceedings of the 28th conference on ACM/IEEE design automation, p.302-308, June 17-22, 1991, San Francisco, California, United States [doi>10.1145/127601.127685]
	7	R. E. Miller. Switching theory, volume 2. Wiley and Sons, 1965.
	8	D.E. Muller and W. C. Bartlcy. A theory of asynchronous circuits. In Annals of Computing Laboratory of Harvard University, pages 204-243,1959.
	9	Leonid Ya. Rosenblum , Alexandre Yakovlev, Signal Graphs: From Self-Timed to Timed Ones, International Workshop on Timed Petri Nets, p.199-206, July 01-03, 1985
	10	A. V. Yakovlev. Analysis of concurrent systems through lances. Theoretical Computer Science, Submitted for publication.
	11	A. V. Yakovlev, L. Lavagno, and A. Sangiovanni-V'mcentelli. A unified signal uansition graph model for asynchronous conuol circuit synthesis. Technical Report UCB/ERL M92/78, U.C. Berkeley, July 1992.