The hardware architecture of the CRISP microprocessor

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The hardware architecture of the CRISP microprocessor

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International Symposium on Computer Architecture archive
Proceedings of the 14th annual international symposium on Computer architecture table of contents

Pittsburgh, Pennsylvania, United States

Pages: 309 - 319

Year of Publication: 1987

ISBN:0-8186-0776-9

Authors

D. R. Ditzel	AT&T Bell Laboratories, Murray Hill, NJ
H. R. McLellan	AT&T Bell Laboratories, Murray Hill, NJ
A. D. Berenbaum	AT&T Information Systems, Holmdel, NJ

Sponsor

SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 14, Downloads (12 Months): 39, Citation Count: 19

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	A.D. Berenbaum, B. W. Colbry, D. R. Ditzel, R. D. Freeman, H. R. McLellan, K. J. O'Connor, and M. Shoji, "A Pipelined 32b Microprocessor with 13Kb of Cache Memory," Proceedings of the 1987 International Solid State Circuits Conference, pp. 34-35 (February, 1987).
	2	David R. Ditzel , H. R. McLellan, Register allocation for free: The C machine stack cache, Proceedings of the first international symposium on Architectural support for programming languages and operating systems, p.48-56, March 01-03, 1982, Palo Alto, California, United States
	3	D. R. Ditzel , H. R. McLellan, Branch folding in the CRISP microprocessor: reducing branch delay to zero, Proceedings of the 14th annual international symposium on Computer architecture, p.2-8, June 02-05, 1987, Pittsburgh, Pennsylvania, United States [doi>10.1145/30350.30351]
	4	A. G. Fraser, "An Introduction to the C-Machine," Proceedings of the BTL/WE Microcomputer Symposium, pp. 9-1 to 9-7 (November 1977).
	5	S. C. Johnson, "A 32-Bit Processor Design," Computing Science Technical Report No. 80 (April 1979).
	6	David A. Patterson , David R. Ditzel, The case for the reduced instruction set computer, ACM SIGARCH Computer Architecture News, v.8 n.6, p.25-33, October 1980 [doi>10.1145/641914.641917]
	7	A. Berenbaum, D. Ditzel, and R. McLellan, Introduction to the CRISP Instruction-Set Architecture, Proceedings of the Spring COMPCON (February, 1987), pp. 86-90.
	8	George Radin, The 801 minicomputer, Proceedings of the first international symposium on Architectural support for programming languages and operating systems, p.39-47, March 01-03, 1982, Palo Alto, California, United States
	9	P.M. Kogge, The Architecture of Pipelined Computers, McGraw-Hill Publisher (1981).

CITED BY 19

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	R. T. Short , H. M. Levy, A simulation study of two-level caches, ACM SIGARCH Computer Architecture News, v.16 n.2, p.81-88, May 1988
	Pohua P. Chang , Wen-mei W. Hwu, Control flow optimization for supercomputer scalar processing, Proceedings of the 3rd international conference on Supercomputing, p.145-153, June 05-09, 1989, Crete, Greece
	A. R. Pleszkun , G. S. Sohi, Multiple instruction issue and single-chip processors, Proceedings of the 21st annual workshop on Microprogramming and microarchitecture, p.64-66, November 28-December 02, 1988, San Diego, California, United States
	Miquel Huguet , Tomás Lang, Architectural support for reduced register saving/restoring in single-window register files, ACM Transactions on Computer Systems (TOCS), v.9 n.1, p.66-97, Feb. 1991
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	Andrew Wolfe , Alex Chanin, Executing compressed programs on an embedded RISC architecture, ACM SIGMICRO Newsletter, v.23 n.1-2, p.81-91, Dec. 1992
	D. R. Ditzel , H. R. McLellan, Branch folding in the CRISP microprocessor: reducing branch delay to zero, Proceedings of the 14th annual international symposium on Computer architecture, p.2-8, June 02-05, 1987, Pittsburgh, Pennsylvania, United States
	Michael Butler , Yale Patt, The effect of real data cache behavior on the performance of a microarchitecture that supports dynamic scheduling, Proceedings of the 24th annual international symposium on Microarchitecture, p.34-41, September 1991, Albuquerque, New Mexico, Puerto Rico
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