High performance integrated Prolog processor IPP

ABSTRACT

To realize the highest performance possible for a sequential processor, and to realize utilization of a large amount of existing software, an integrated Prolog processor (IPP) and its optimized compiler are now being developed. A tagged architecture under constraints of a general purpose computer and a memory management strategy to achieve a high performance are discussed and then an IPP architecture is presented. Based on the Prolog instruction set, which is an extension of Warren's, the Prolog compiler introduces new functions such as indexing by the optimal argument and global register assignment across determinate built-in predicates. The performance of the IPP for the append program is 1 million logical inferences per second, which is the highest possible for a sequential processor. In the 8-queen program a considerable speed-up is obtained by the new functions.

REFERENCES

• 1: W F. Clocksin , Christopher S. Mellish, Programming in Prolog (2nd ed.), Springer-Verlag New York, Inc., New York, NY, 1984
• 2: D.H.Warren, "An Abstract Prolog Instruction Set," Technical Note 309, Artificial Intelligence Center, SRI International, October 1983.
• 3: Ryosei Nakazaki , Akihiko Konagaya , Shin'ichi Habata , Hideo Shimazu , Mamoru Umemutra , Masahiro Yamamoto , Minoru Yokota , Takashi Chikayama, Design of a high-speed Prolog machine (HPM), Proceedings of the 12th annual international symposium on Computer architecture, p.191-197, June 17-19, 1985, Boston, Massachusetts, United States
• 4: T. P. Dobry , A. M. Despain , Y. N. Patt, Performance studies of a Prolog machine architecture, Proceedings of the 12th annual international symposium on Computer architecture, p.180-190, June 17-19, 1985, Boston, Massachusetts, United States
• 5: A.M. Despain, "A High Performance Prolog Co-processor," Proceedings of WESCON 85, 1985, no 18/2.
• 6: R.Onai et al., "Static Analysis of Prolog Programs," Proceedings of the Logic programming Conference 84, Tokyo, March pp 19-21, 1984.
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• 8: S. Abe et al., "A New Optimization Technique for a Prolog Canpiler," Proceedings of Compcon 86 Spring, San Francisco, March 1986, pp 241-245.
• 9: Hideaki Komatsu , Naoyuki Tamura , Yasuo Asakawa , Toshiaki Kurokawa, An optimizing Prolog compiler, The 5th Conference on Logic programming '86, p.104-115, July 1987, Tokyo, Japan

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.3 Other Architecture Styles
          Subjects: High-level language architectures**

Additional Classification:
  C. Computer Systems Organization

  D. Software
  D.3 PROGRAMMING LANGUAGES
      D.3.2 Language Classifications

          Nouns: Prolog
      D.3.4 Processors
          Subjects: Compilers

  I. Computing Methodologies
  I.2 ARTIFICIAL INTELLIGENCE
      I.2.5 Programming Languages and Software

          Nouns: Prolog

General Terms:
Design, Languages, Measurement, Performance