Scheduling hardware/software systems using symbolic techniques

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Scheduling hardware/software systems using symbolic techniques

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International Conference on Hardware Software Codesign archive
Proceedings of the seventh international workshop on Hardware/software codesign table of contents

Rome, Italy

Pages: 173 - 177

Year of Publication: 1999

ISBN:1-58113-132-1

Authors

Karsten Strehl	Swiss Federal Institute of Technology, Zurich, Switzerland
Lothar Thiele	Swiss Federal Institute of Technology, Zurich, Switzerland
Dirk Ziegenbein	Technical Univ. of Braunschweig, Braunschweig, Germany
Rolf Ernst	Technical Univ. of Braunschweig, Braunschweig, Germany
Jürgen Teich	Univ. of Paderborn, Paderborn, Germany

Sponsors

IEEE-CS : Computer Society
IFIP : International Federation for Information Processing
SIGSOFT: ACM Special Interest Group on Software Engineering
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 10, Citation Count: 9

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	6	Steve Haynal , Forrest Brewer, Efficient encoding for exact symbolic automata-based scheduling, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.477-481, November 08-12, 1998, San Jose, California, United States [doi>10.1145/288548.289074]
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	12	M. Szgmni, L. Lavagno, Y. Watanabe. and A. Sangiovanni-VinccnteUi. Quasi-static scheduling of embedded sothvwe using free-choice Petri nets In Pmceedings of the WorlLFhop on Hardware Design and Pewi Nets IHPWN '98,. 1998.
	13	Karsten Strehl , Lothar Thiele, Symbolic model checking of process networks using interval diagram techniques, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.686-692, November 08-12, 1998, San Jose, California, United States [doi>10.1145/288548.289117]
	14	Karsten Strehl , Lothar Thiele, Interval diagram techniques for symbolic model checking of Petri nets, Proceedings of the conference on Design, automation and test in Europe, p.14-es, January 1999, Munich, Germany [doi>10.1145/307418.307452]
	15	Lofhar mete, lttrge Teich, Mti Naedele, Kxste Suehl. and Dik Ziegenkin. SCF-state machine contmkd Row diagrams. Technical Report TIK-33, Computer Engineering and NetworLs Lab (nK), Swiss Federal 1nstitte of Technology @TH) Zurich, Gloriasvdsse 3.5, C-8092 Zurich. January ,998.
	16	D. Ziegenbein , R. Ernst , K. Richter , J. Teich , L. Thiele, Combining multiple models of computation for scheduling and allocation, Proceedings of the 6th international workshop on Hardware/software codesign, p.9-13, March 15-18, 1998, Seattle, Washington, United States
	17	D. Ziegenbein , K. Richter , R. Ernst , J. Teich , L. Thiele, Representation of process mode correlation for scheduling, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.54-61, November 08-12, 1998, San Jose, California, United States [doi>10.1145/288548.288560]

CITED BY 9

	L. Thiele , K. Strehl , D. Ziegenbein , R. Ernst , J. Teich, FunState—an internal design representation for codesign, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, p.558-565, November 07-11, 1999, San Jose, California, United States
	Chun Wong , Paul Marchal , Peng Yang, Task concurrency management methodology to schedule the MPEG4 IM1 player on a highly parallel processor platform, Proceedings of the ninth international symposium on Hardware/software codesign, p.170-177, April 2001, Copenhagen, Denmark
	A. Doboli, Integrated hardware-software co-synthesis for design of embedded systems under power and latency constraints, Proceedings of the conference on Design, automation and test in Europe, p.612-619, March 2001, Munich, Germany
	Jordi Cortadella , Alex Kondratyev , Luciano Lavagno , Marc Massot , Sandra Moral , Claudio Passerone , Yosinori Watanabe , Alberto Sangiovanni-Vincentelli, Task generation and compile-time scheduling for mixed data-control embedded software, Proceedings of the 37th conference on Design automation, p.489-494, June 05-09, 2000, Los Angeles, California, United States
	Stephen A. Edwards, Tutorial: Compiling concurrent languages for sequential processors, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.8 n.2, p.141-187, April 2003
	Dirk Ziegenbein , Kai Richter , Rolf Ernst , Lothar Thiele , Jürgen Teich, SPI: a system model for heterogeneously specified embedded systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.4, p.379-389, August 2002
	Nattawut Thepayasuwan , Alex Doboli, Layout conscious approach and bus architecture synthesis for hardware/software codesign of systems on chip optimized for speed, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.13 n.5, p.525-538, May 2005
	Jordi Cortadella , Alex Kondratyev , Luciano Lavagno , Alexander Taubin , Yosinori Watanabe, Quasi-static Scheduling for Concurrent Architectures, Fundamenta Informaticae, v.62 n.2, p.171-196, April 2004
	Dong Wu , Bashir M. Al-Hashimi , Petru Eles, Scheduling and Mapping of Conditional Task Graphs for the Synthesis of Low Power Embedded Systems, Proceedings of the conference on Design, Automation and Test in Europe, p.10090, March 03-07, 2003