Multilanguage design of heterogeneous systems

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Multilanguage design of heterogeneous systems

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International Conference on Hardware Software Codesign archive
Proceedings of the seventh international workshop on Hardware/software codesign table of contents

Rome, Italy

Pages: 54 - 58

Year of Publication: 1999

ISBN:1-58113-132-1

Authors

P. Coste	TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France
F. Hessel	TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France
Ph. Le Marrec	TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France
Z. Sugar	TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France
M. Romdhani	TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France
R. Suescun	TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France
N. Zergainoh	TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France
A. A. Jarraya	TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France

Sponsors

IEEE-CS : Computer Society
IFIP : International Federation for Information Processing
SIGSOFT: ACM Special Interest Group on Software Engineering
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 14, Citation Count: 17

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 17

	S. Mir , B. Charlot , G. Nicolescu , P. Coste , F. Parrain , N. Zergainoh , B. Courtois , A. Jerraya , M. Rencz, Towards design and validation of mixed-technology SOCs, Proceedings of the 10th Great Lakes symposium on VLSI, p.29-33, March 02-04, 2000, Chicago, Illinois, United States
	Patrice Gerin , Sungjoo Yoo , Gabriela Nicolescu , Ahmed A. Jerraya, Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures, Proceedings of the 2001 conference on Asia South Pacific design automation, p.63-68, January 2001, Yokohama, Japan
	Axel Jantsch , Per Bjuréus, Composite signal flow: a computational model combining events, sampled streams, and vectors, Proceedings of the conference on Design, automation and test in Europe, p.154-160, March 27-30, 2000, Paris, France
	Kjetil Svarstad , Nezih Ben-Fredj , Gabriela Nicolescu , Ahmed A. Jerraya, A higher level system communication model for object-oriented specification and design of embedded systems, Proceedings of the 2001 conference on Asia South Pacific design automation, p.69-77, January 2001, Yokohama, Japan
	Per Bjuréus , Axel Jantsch, MASCOT: a specification and cosimulation method integrating data and control flow, Proceedings of the conference on Design, automation and test in Europe, p.161-168, March 27-30, 2000, Paris, France
	Andreas Gerstlauer , Daniel D. Gajski, System-level abstraction semantics, Proceedings of the 15th international symposium on System Synthesis, October 02-04, 2002, Kyoto, Japan
	Marek Jersak , Kai Richter , Rafik Henia , Rolf Ernst , Frank Slomka, Transformation of SDL specifications for system-level timing analysis, Proceedings of the tenth international symposium on Hardware/software codesign, May 06-08, 2002, Estes Park, Colorado
	Gabriela Nicolescu , Sungjoo Yoo , Aimen Bouchhima , Ahmed Amine Jerraya, Validation in a component-based design flow for multicore SoCs, Proceedings of the 15th international symposium on System Synthesis, October 02-04, 2002, Kyoto, Japan
	Luca Formaggio , Franco Fummi , Graziano Pravadelli, A timing-accurate HW/SW co-simulation of an ISS with SystemC, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 08-10, 2004, Stockholm, Sweden
	Mirko Loghi , Tiziana Margaria , Graziano Pravadelli , Bernhard Steffen, Dynamic and formal verification of embedded systems: a comparative survey, International Journal of Parallel Programming, v.33 n.6, p.585-611, December 2005
	K. Benkrid , A. Benkrid , S. Belkacemi, Efficient FPGA hardware development: A multi-language approach, Journal of Systems Architecture: the EUROMICRO Journal, v.53 n.4, p.184-209, April, 2007
	Franco Fummi , Giovanni Perbellini , Mirko Loghi , Massimo Poncino, ISS-centric modular HW/SW co-simulation, Proceedings of the 16th ACM Great Lakes symposium on VLSI, April 30-May 01, 2006, Philadelphia, PA, USA
	Paolo Destro , Franco Fummi , Graziano Pravadelli, A smooth refinement flow for co-designing HW and SW threads, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
	Franco Fummi , Mirko Loghi , Stefano Martini , Marco Monguzzi , Giovanni Perbellini , Massimo Poncino, Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation, Proceedings of the conference on Design, Automation and Test in Europe, p.798-803, March 07-11, 2005
	Franco Fummi , Stefano Martini , Giovanni Perbellini , Massimo Poncino, Native ISS-SystemC Integration for the Co-Simulation of Multi-Processor SoC, Proceedings of the conference on Design, automation and test in Europe, p.10564, February 16-20, 2004
	Rainer Dömer , Andreas Gerstlauer , Junyu Peng , Dongwan Shin , Lukai Cai , Haobo Yu , Samar Abdi , Daniel D. Gajski, System-on-chip environment: a SpecC-based framework for heterogeneous MPSoC design, EURASIP Journal on Embedded Systems, v.2008 n.3, p.1-13, January 2008
	Franco Fummi , Mirko Loghi , Massimo Poncino , Graziano Pravadelli, A cosimulation methodology for HW/SW validation and performance estimation, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.14 n.2, p.1-32, March 2009