ACM Home Page
Please provide us with feedback. Feedback
Digital Library logoTake a look at the new version of this page: [ beta version ]. Tell us what you think.
Performance prediction of large parallel applications using parallel simulations
Full text PdfPdf (1.58 MB)
Source Principles and Practice of Parallel Programming archive
Proceedings of the seventh ACM SIGPLAN symposium on Principles and practice of parallel programming table of contents
Atlanta, Georgia, United States
Pages: 151 - 162  
Year of Publication: 1999
ISBN:1-58113-100-3
Also published in ...
Authors
Rajive Bagrodia  Computer Science Department, University of California, Los Angeles, CA
Ewa Deeljman  Computer Science Department, University of California, Los Angeles, CA
Steven Docy  Computer Science Department, University of California, Los Angeles, CA
Thomas Phan  Computer Science Department, University of California, Los Angeles, CA
Sponsor
SIGPLAN: ACM Special Interest Group on Programming Languages
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 2,   Downloads (12 Months): 50,   Citation Count: 14
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/301104.301118
What is a DOI?

ABSTRACT

Accurate simulation of large parallel applications can be facilitated with the use of direct execution and parallel discrete event simulation. This paper describes the use of COMPASS, a direct execution-driven, parallel simulator for performance prediction of programs that include both communication and I/O intensive applications. The simulator has been used to predict the performance of such applications on both distributed memory machines like the IBM SP and shared-memory machines like the SGI Origin 2000. The paper illustrates the usefulness of COMPASS as a versatile performance prediction tool. We use both real-world applications and synthetic benchmarks to study application scalability, sensitivity to communication latency, and the interplay between factors like communication pattern and parallel file system caching on application performance. We also show that the simulator is accurate in its predictions and that it is also efficient in its ability to use parallel simulation to reduce its own execution time which, in some cases, has yielded a nearlinear speedup.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
 
2
D. Bailey, T. Harris, W. Shaphir, R. van der Wijngaart, A. Woo, and M. Yarrow. "The NAS Parallel Benchmarks 2.0," Report NAS-95-090, NASA Ames Research Center, 1995.
 
3
S.J. Baylor, C. Benveniste and L.J. Beolhouwer. "A Methodology for Evaluating Parallel I/O Performance for Massively Parallel Processors." In Proceedings of the 27th Annual Simulation Symposium, 1994, pp.31-40.
 
4
 
5
M. Chandy and J. Misra. "Distributed Simulation: A Case Study in Design And Verification Of Distributed Programs," IEEE Trans. on Software Engineering, Sept. 1979, pp.440- 452.
6
 
7
8
 
9
 
10
M.H. Dahlin, R.Y. Wang, T.E. Anderson and D.A. Patterson. "Remote Client Memory to Improve File System Performance." In Proceedings of the 1994 Symposium on Operating Systems.
 
11
H.Davis, S.R. Goldschmidt and Hennessey. "Multiprocessor Simulation and Tracing Using Tango." In Proceedings of ICPP'91, pp. 99-107, August 1991.
12
 
13
 
14
J2c (Fortran to C converter), http://www.netlib.org/f2c/
15
16
 
17
 
18
19
 
20
"ASCI Blue-Pacific IBM RS/6000 TR System at Lawrence Livermore National Laboratory," http://www.llnl.gov/asci/platforms/bluepac/tr.hwtable.html.
21
 
22
Y. Luo. "MPI Performance Study on the SGI Origin 2000," Pacific Rim Conference on Communications, Computers and Signal Processing, 1997, pp.269-272.
 
23
S.S. Mukherjee, S.K. Reinhardt, B. Falsafi, M. Litzkow, S. Huss-Lederman, M.D. Hill, J.R. Larus, and D.A. Wood. "Wisconsin Wind Tunnel II: A Fast and Portable Parallel Architecture Simulator," Workshop on Performance Analysis and Its Impact on Design (PAID), 1997.
24
 
25
 
26
 
27
28
 
29
J.M. clel Rosario, R. Bordawekar and A. Choudhary. "Improved Parallel I/O via a Two-Phase Runtime Access Strategy." In Proceedings of the IPP '93 Workshop on I/0 in Parallel Computer Systems, 1993, pp. 56-70.
30
 
31
 
32
"The ASCI sweep3d Benchmark Code," http://www.llnl.gov/asci_benchmarks/.

CITED BY  14

Collaborative Colleagues:
Rajive Bagrodia: colleagues
Ewa Deeljman: colleagues
Steven Docy: colleagues
Thomas Phan: colleagues