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The program decision logic approach to predicated execution
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Source International Symposium on Computer Architecture archive
Proceedings of the 26th annual international symposium on Computer architecture table of contents
Atlanta, Georgia, United States
Pages: 208 - 219  
Year of Publication: 1999
ISBN:0-7695-0170-2
Also published in ...
Authors
David I. August  Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
John W. Sias  Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
Jean-Michel Puiatti  Logic Systems Laboratory (DI-LSL), Swiss Federal Institute of Technology of Lausanne (EPFL), CH-1015 Lausanne, Switzerland
Scott A. Mahlke  Hewlett-Packard Laboratories, Hewlett-Packard, Palo Alto, CA
Daniel A. Connors  Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
Kevin M. Crozier  Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
Wen-mei W. Hwu  Center for Reliable and High-Performance Computing, University of Illinois, Urbana-Champaign, IL
Sponsors
IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
IEEE Computer Society  Washington, DC, USA
Bibliometrics
Downloads (6 Weeks): 13,   Downloads (12 Months): 32,   Citation Count: 7
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ABSTRACT

Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW processors. One of the major impediments to achieving this goal has been inefficient programmatic control flow. Historically, the compiler has translated the programmer's original control structure directly into assembly code with conditional branch instructions. Eliminating inefficiencies in handling branch instructions and exploiting ILP has been the subject of much research. However, traditional branch handling techniques cannot significantly alter the program's inherent control structure. The advent of predication as a program control representation has enabled compilers to manipulate control in a form more closely related to the underlying program logic. This work takes full advantage of the predication paradigm by abstracting the program control flow into a logical form referred to as a program decision logic network. This network is modeled as a Boolean equation and minimized using modified versions of logic synthesis techniques. After minimization, the more efficient version of the program's original control flow is re-expressed in predicated code. Furthermore, this paper proposes extensions to the HPL PlayDoh predication model in support of more effective predicate decision logic network minimization. Finally, this paper shows the ability of the mechanisms presented to overcome limits on ILP previously imposed by rigid program control structure.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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S. B. Akers. Binary decision diagrams. IEEE Transaction on Computers, C-27(8):509-5t6, June t978.
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V. Kathail, M. S. Schlansker, and B. R. Rau. HPL Play- Doh architecture specification: Version 1.0. Technical Report HPL-93-80, Hewlett-Packard Laboratories, Palo Alto, CA, February t994.
 
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CITED BY  7

Collaborative Colleagues:
David I. August: colleagues
John W. Sias: colleagues
Jean-Michel Puiatti: colleagues
Scott A. Mahlke: colleagues
Daniel A. Connors: colleagues
Kevin M. Crozier: colleagues
Wen-mei W. Hwu: colleagues