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Simultaneous subordinate microthreading (SSMT)
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Source International Symposium on Computer Architecture archive
Proceedings of the 26th annual international symposium on Computer architecture table of contents
Atlanta, Georgia, United States
Pages: 186 - 195  
Year of Publication: 1999
ISBN:0-7695-0170-2
Also published in ...
Authors
Robert S. Chappell  EECS Department (ACAL), The University of Michigan, Ann Arbor, Michigan
Jared Stark  EECS Department (ACAL), The University of Michigan, Ann Arbor, Michigan
Sangwook P. Kim  Intel Corporation, Santa Clara, CA
Steven K. Reinhardt  EECS Department (ACAL), The University of Michigan, Ann Arbor, Michigan
Yale N. Patt  EECS Department (ACAL), The University of Michigan, Ann Arbor, Michigan
Sponsors
IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
IEEE Computer Society  Washington, DC, USA
Bibliometrics
Downloads (6 Weeks): 13,   Downloads (12 Months): 39,   Citation Count: 58
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ABSTRACT

Current work in Simultaneous Multithreading provides little benefit to programs that aren't partitioned into threads. We propose Simultaneous Subordinate Microthreading (SSMT) to correct this by spawning subordinate threads that perform optimizations on behalf of the single primary thread. These threads, written in microcode, are issued and executed concurrently with the primary thread. They directly manipulate the microarchitecture to improve the primary thread's branch prediction accuracy, cache hit rate, and prefetch effectiveness. All contribute to the performance of the primary thread. This paper introduces SSMT and discusses its potential to increase performance. We illustrate its usefulness with an SSMT machine that executes subordinate microthreads to improve the branch prediction of the primary thread. We show simulation results for the SPECint95 benchmarks.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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S. McFarling. Combining branch predictors. Technical Report TN-36, Digital Western Research Laboratory, June 1993.
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Y. N. Patt. Keynote Address, Workshop on Simultaneous Multithreading (HPCA-4), 1998.
 
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B.J. Smith. A pipelined shared resource mimd computer. In Proceedings of the 1978 International Conference on Parallel Processing, ! 978.
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CITED BY  58

Collaborative Colleagues:
Robert S. Chappell: colleagues
Jared Stark: colleagues
Sangwook P. Kim: colleagues
Steven K. Reinhardt: colleagues
Yale N. Patt: colleagues