| On the behavior of congestion minimization during placement |
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International Symposium on Physical Design
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Proceedings of the 1999 international symposium on Physical design
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Monterey, California, United States
Pages: 145 - 150
Year of Publication: 1999
ISBN:1-58113-089-9
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Authors
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Maogang Wang
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Department of Electrical and Computer Engineering, Northwestern University, Evanston, IL
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Majid Sarrafzadeh
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Department of Electrical and Computer Engineering, Northwestern University, Evanston, IL
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| Bibliometrics |
Downloads (6 Weeks): 2, Downloads (12 Months): 19, Citation Count: 30
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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J. M. Kleinhans, G. Sigl, F. M. Johannes, and K. J. Antreich. "GORDIAN: VLSI Placement by Quadratic Programming and Slicing Optimization". IEEE Trans. actions on Computer Aided Design, 10(3):365-365, 1991.
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S. Mayrhofer and U. Lauther. "Congestion-Driven Placement Using a New Multi-Partitioning Heuristic". in International Conference on Computer-Aided Design, pages 332-335. IEEE/ACM, November 1990.
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Phiroze N. Parakh , Richard B. Brown , Karem A. Sakallah, Congestion driven quadratic placement, Proceedings of the 35th annual conference on Design automation, p.275-278, June 15-19, 1998, San Francisco, California, United States
[doi> 10.1145/277044.277121]
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Y. Saab. "A Fast Clustering-based Min-cut Placement Algorithm with Simulated-annealing Performance". VLSI Design: An International Journal o.f Custom- Chip Design, Simulation, and Testing, 5(1):37-48, 1996.
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C. Sechen. VLSI Placement and Global Routing Using Simulated Annealing. Kluwer, B. V., Deventer, The Netherlands, 1988.
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CITED BY 30
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Jinan Lou , Shankar Krishnamoorthy , Henry S. Sheng, Estimating routing congestion using probabilistic analysis, Proceedings of the 2001 international symposium on Physical design, p.112-117, April 01-04, 2001, Sonoma, California, United States
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Xiaojian Yang , Ryan Kastner , Majid Sarrafzadeh, Congestion estimation during top-down placement, Proceedings of the 2001 international symposium on Physical design, p.164-169, April 01-04, 2001, Sonoma, California, United States
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Maogang Wang , Xiaojian Yang , Kenneth Eguro , Majid Sarrafzadeh, Multi-center congestion estimation and minimization during placement, Proceedings of the 2000 international symposium on Physical design, p.147-152, May 2000, San Diego, California, United States
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A. Ranjan , A. Srivastava , V. Karnam , M. Sarrafzadeh, Layout aware retiming, Proceedings of the 11th Great Lakes symposium on VLSI, p.25-30, March 2001, West Lafayette, Indiana, United States
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Andrew E. Caldwell , Andrew B. Kahng , Igor L. Markov, Can recursive bisection alone produce routable placements?, Proceedings of the 37th conference on Design automation, p.477-482, June 05-09, 2000, Los Angeles, California, United States
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Lerong Cheng , Xiaoyu Song , Guowu Yang , Zhiwei Tang, A fast congestion estimator for routing with bounded detours, Proceedings of the 2004 conference on Asia South Pacific design automation: electronic design and solution fair, p.666-670, January 27-30, 2004, Yokohama, Japan
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Yongqiang Lu , C. N. Sze , Xianlong Hong , Qiang Zhou , Yici Cai , Liang Huang , Jiang Hu, Navigating registers in placement for clock network minimization, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
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Yongqiang Lu , C. N. Sze , Xianlong Hong , Qiang Zhou , Yici Cai , Liang Huang , Jiang Hu, Register placement for low power clock network, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
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Sheqin Dong , Xianlong Hong , Xin Qi , Ruijie Wang , Song Chen , Jun Gu, VLSI module placement with pre-placed modules and considering congestion using solution space smoothing, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
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Yaoguang Wei , Sheqin Dong , Xianlong Hong , Yuchun Ma, An accurate and efficient probabilistic congestion estimation model in x architecture, Proceedings of the 2007 international workshop on System level interconnect prediction, March 17-18, 2007, Austin, Texas, USA
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Taraneh Taghavi , Foad Dabiri , Ani Nahapetian , Majid Sarrafzadeh, Tutorial on congestion prediction, Proceedings of the 2007 international workshop on System level interconnect prediction, March 17-18, 2007, Austin, Texas, USA
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Wenting Hou , Hong Yu , Xianlong Hong , Yici Cai , Weimin Wu , Jun Gu , William H. Kao, A new congestion-driven placement algorithm based on cell inflation, Proceedings of the 2001 conference on Asia South Pacific design automation, p.605-608, January 2001, Yokohama, Japan
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Lerong Cheng , Xiaoyu Song , Guowu Yang , William N. N. Hung , Zhiwei Tang , Shaodi Gao, A fast congestion estimator for routing with bounded detours, Integration, the VLSI Journal, v.41 n.3, p.360-370, May, 2008
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Fei He , Xiaoyu Song , Ming Gu , Lerong Cheng , Guowu Yang , Zhiwei Tang , Jiaguang Sun, A combinatorial congestion estimation approach with generalized detours, Computers & Mathematics with Applications, v.51 n.6-7, p.1113-1126, March, 2006
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