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An efficient sequential quadratic programming formulation of optimal wire spacing for cross-talk noise avoidance routing
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Source International Symposium on Physical Design archive
Proceedings of the 1999 international symposium on Physical design table of contents
Monterey, California, United States
Pages: 22 - 28  
Year of Publication: 1999
ISBN:1-58113-089-9
Authors
Paul B. Morton  Dept. of Computer Engineering, University of California, Santa Cruz
Wayne Dai  Dept. of Computer Engineering, University of California, Santa Cruz
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 10,   Downloads (12 Months): 27,   Citation Count: 2
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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H. Chen and C. Wong, "Wiring and Crosstalk Avoidonce in Multi-Chip Module Design," in Proc. IEEE Custom Integrated Circuits Conference, pp. 28.6.1- 28.6.4, 1992.
 
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T. Miyoshi, S. Wakabayashi, T. Koide, and N. Yoshida, "An MCM Routing Algorithm Considering Crosstalk," in Proc. iEEE Int. Symposium on Circuits and Systems, pp. 211-214, 1995.
 
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T. Gao and C. Liu, "Minimum Crosstalk Channel Routing," IEEB Trans. Computer-Aided Design, vol. 15, no. 5, pp. 465-474, 1996.
 
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K. Jhang, S. Ha, and C. Jhon, "A Segment Rearrangement Approach to Channel Routing Under the Cromtalk Constraints," in IBBE Asia.Pacific Con}. onf Circuits and Bysterns, pp. 536-541, 1994.
 
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A. Onozawa, K. Chaudhary, and E. Kuh, "Performance Driven Spacing Algorithms using Attractive and Repulsive Constraints for Submicron LSI's," IEEB ~ Trans. Computer.Aided Design, vol. 14, no. 6, pp. 707- 719, 1995.
 
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T. Sakurai, "Closed-Form Expressions for Interconnection Delay, Coupling, and Crosstalk in VLSI's," IEEE Trans. on Electron Devices, vol. 40, no. 1, pp. 118-124, 1993.
 
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A. Vittal and M. Marek-Sadowska, "Crosstalk Reduction for VLSI," IEEE Trans. Computer-Aided Design, vol. 16, no. 3, pp. 290-298, 1997.
 
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W. Elmore, "The Transient Response of Damped Linear Networks with Particular Regard to Wideband Amplifiers," Journal of Applied Physics, vol. 19, no. 1, pp. 55-63, 1948.
 
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J. Rubinstein, P. Penfield, and M. Horowitz, "Signal Delay in RC Tree Networks," IF, BE Trans. Computer- Aided Design, vol. 2, no. 3, pp. 202-211, 1983.
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P. Gill, W. Murray, and M. Wright, Practical Optimization. London: Harcourt Brace and Co., 1981.
 
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N. Menezes, R. Baldick, and L. Pileggi, "A Sequential Quadratic Programming Approach to Concurrent Gate and Wire Sizing," IEEE ~ns. Computer-Aided Design, vol. 16, no. 8, pp. 867-881, 1997.
 
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Semiconductor Industry Association, National Technology Roadrnap for Semiconductors. 1994.


Collaborative Colleagues:
Paul B. Morton: colleagues
Wayne Dai: colleagues