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Why a CAD-verified FPGA makes routing so simple and fast!: a result of co-designing FPGAs and CAD algorithms
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Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays table of contents
Monterey, California, United States
Page: 255  
Year of Publication: 1999
ISBN:1-58113-088-0
Authors
Takahiro Murooka  NTT Optical Network Systems Laboratories
Atsushi Takahara  NTT Optical Network Systems Laboratories
Toshiaki Miyazaki  NTT Optical Network Systems Laboratories
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays

Additional Classification:
  B. Hardware
  B.8 Performance and Reliability


General Terms:
Algorithms, Design, Performance, Theory

Collaborative Colleagues:
Takahiro Murooka: colleagues
Atsushi Takahara: colleagues
Toshiaki Miyazaki: colleagues

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