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Run-time parameterizable cores
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Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays table of contents
Monterey, California, United States
Page: 252  
Year of Publication: 1999
ISBN:1-58113-088-0
Authors
Steve Guccione  Xilinx
Delon Levi  Xilinx
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 4,   Downloads (12 Months): 19,   Citation Count: 1
Additional Information:

cited by   index terms   collaborative colleagues  

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DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/296399.296524
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CITED BY
Prasanna Sundararajan , Steven A. Guccione, Run-Time defect tolerance using JBits, Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays, p.193-198, February 2001, Monterey, California, United States

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
  B.8 Performance and Reliability


General Terms:
Design, Performance, Theory

Collaborative Colleagues:
Steve Guccione: colleagues
Delon Levi: colleagues

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