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Performance of database workloads on shared-memory systems with out-of-order processors
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Source Architectural Support for Programming Languages and Operating Systems archive
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems table of contents
San Jose, California, United States
Pages: 307 - 318  
Year of Publication: 1998
ISBN:1-58113-107-0
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Authors
Parthasarathy Ranganathan  Electrical and Computer Engineering, Rice University
Kourosh Gharachorloo  Western Research Laboratory, Compaq Computer Corporation
Sarita V. Adve  Electrical and Computer Engineering, Rice University
Luiz André Barroso  Western Research Laboratory, Compaq Computer Corporation
Sponsors
SIGOPS: ACM Special Interest Group on Operating Systems
IEEE-CS : Computer Society
SIGARCH: ACM Special Interest Group on Computer Architecture
SIGPLAN: ACM Special Interest Group on Programming Languages
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 6,   Downloads (12 Months): 61,   Citation Count: 43
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ABSTRACT

Database applications such as online transaction processing (OLTP) and decision support systems (DSS) constitute the largest and fastest-growing segment of the market for multiprocessor servers. However, most current system designs have been optimized to perform well on scientific and engineering workloads. Given the radically different behavior of database workloads (especially OLTP), it is important to re-evaluate key system design decisions in the context of this important class of applications.This paper examines the behavior of database workloads on shared-memory multiprocessors with aggressive out-of-order processors, and considers simple optimizations that can provide further performance improvements. Our study is based on detailed simulations of the Oracle commercial database engine. The results show that the combination of out-of-order execution and multiple instruction issue is indeed effective in improving performance of database workloads, providing gains of 1.5 and 2.6 times over an in-order single-issue processor for OLTP and DSS, respectively. In addition, speculative techniques enable optimized implementations of memory consistency models that significantly improve the performance of stricter consistency models, bringing the performance to within 10--15% of the performance of more relaxed models.The second part of our study focuses on the more challenging OLTP workload. We show that an instruction stream buffer is effective in reducing the remaining instruction stalls in OLTP, providing a 17% reduction in execution time (approaching a perfect instruction cache to within 15%). Furthermore, our characterization shows that a large fraction of the data communication misses in OLTP exhibit migratory behavior; our preliminary results show that software prefetch and writeback/flush hints can be used for this data to further reduce execution time by 12%.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  43

Collaborative Colleagues:
Parthasarathy Ranganathan: colleagues
Kourosh Gharachorloo: colleagues
Sarita V. Adve: colleagues
Luiz André Barroso: colleagues