Full-chip verification of UDSM designs

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Full-chip verification of UDSM designs

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International Conference on Computer Aided Design archive
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design table of contents

San Jose, California, United States

Pages: 453 - 460

Year of Publication: 1998

ISBN:1-58113-008-2

Authors

R. Saleh	Simplex Solutions, 521 Almanor Avenue, Sunnyvale, CA
D. Overhauser	Simplex Solutions, 521 Almanor Avenue, Sunnyvale, CA
S. Taylor	CMOS Solutions, HC1 , BOX 238, Olga, WA

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
IEEE-EDS : Electronic Devices Society
IEEE-CAS : Circuits & Systems

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 9, Citation Count: 8

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 8

	Mehrdad Nourani , Amir Attarha, Built-in self-test for signal integrity, Proceedings of the 38th conference on Design automation, p.792-797, June 2001, Las Vegas, Nevada, United States
	Yanhong Yuan , Prithviraj Banerjee, Incremental capacitance extraction and its application to iterative timing-driven detailed routing, Proceedings of the 1999 international symposium on Physical design, p.42-47, April 12-14, 1999, Monterey, California, United States
	Domine Leenaerts , Georges Gielen , Rob A. Rutenbar, CAD solutions and outstanding challenges for mixed-signal and RFIC design, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
	Muzhou Shao , D. F. Wong , Youxin Gao , Li-Pen Yuan , Huijing Cao, Shaping interconnect for uniform current density, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.254-259, November 10-14, 2002, San Jose, California
	P. Bazargan-Sabet , F. Ilponse, Modeling crosstalk noise for deep submicron verification tools, Proceedings of the conference on Design, automation and test in Europe, p.530-534, March 2001, Munich, Germany
	Mehrdad Nourani , Amir Attarha, Signal Integrity: Fault Modeling and Testing in High-Speed SoCs, Journal of Electronic Testing: Theory and Applications, v.18 n.4-5, p.539-554, August-October 2002
	Tsung-Hao Chen , Jeng-Liang Tsai , T. Karnik, HiSIM: hierarchical interconnect-centric circuit simulator, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.489-496, November 07-11, 2004
	N. Ahmed , M. Tehranipour , M. Nourani, Extending JTAG for Testing Signal Integrity in SoCs, Proceedings of the conference on Design, Automation and Test in Europe, p.10218, March 03-07, 2003