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Efficient analog circuit synthesis with simultaneous yield and robustness optimization
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Source International Conference on Computer Aided Design archive
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California, United States
Pages: 308 - 311  
Year of Publication: 1998
ISBN:1-58113-008-2
Authors
Geert Debyser  Katholieke Universiteit Leuven, Belgium
Georges Gielen  Katholieke Universiteit Leuven, Belgium
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
IEEE-EDS : Electronic Devices Society
IEEE-CAS : Circuits & Systems
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 10,   Downloads (12 Months): 39,   Citation Count: 7
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
tC Antreich, H. Graeb, C. Wieser, "Circuit analysis and optimization driven by worst-case distances," IEEE Transactions on Computer-Aidod Design, Vol. 13, No. l, pp. 57-71, January 1994.
2
 
3
T. Mukherjee, L.R. Carley, "Rapid yield estimation as a computer aid for analog circuit design," IEEE Journal of Solid-State Circuits, Vol. 26, No. 3, pp. 291-199, March 1991.
 
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5
K. Swings, W. Sansen, G. Gielen, "DONALD : An intelligent analog IC design system based on manipulation of design equations," Prec. IEEE CICC, pp. 8.6.1-4, May 1990.
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7
G. Gielen, G. Debyser, et al., "Use of symbolic analysis in analog circuit synthesis," Proe. IEEE ISCAS, pp. 2205-2208, May 1995.
 
8
J. Chen, M. Styblinski, "A systematic approach of statistical modeling and its applications to CMOS circuits," Prec. IEEE ISCAS, pp. 1805-1808, May 1993.
 
9
M. Styblinski, S. Aftab, "IC variability minimization using a new Cp and Cpk based variability/performanee measure" Prec. IEEE ISCAS, May- June 1994.

CITED BY  8

Collaborative Colleagues:
Geert Debyser: colleagues
Georges Gielen: colleagues