Slicing floorplans with pre-placed modules

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Slicing floorplans with pre-placed modules

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International Conference on Computer Aided Design archive
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design table of contents

San Jose, California, United States

Pages: 252 - 258

Year of Publication: 1998

ISBN:1-58113-008-2

Authors

F. Y. Young	Department of Computer Sciences, The University of Texas at Austin
D. F. Wong	Department of Computer Sciences, The University of Texas at Austin

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
IEEE-EDS : Electronic Devices Society
IEEE-CAS : Circuits & Systems

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 4, Downloads (12 Months): 22, Citation Count: 11

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	H. Murata , K. Fujiyoshi , M. Kaneko, VLSI/PCB placement with obstacles based on sequence-pair, Proceedings of the 1997 international symposium on Physical design, p.26-31, April 14-16, 1997, Napa Valley, California, United States [doi>10.1145/267665.267675]
	2	Hiroshi Murata , Kunihiro Fujiyoshi , Shigetoshi Nakatake , Yoji Kajitani, Rectangle-packing-based module placement, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.472-479, November 05-09, 1995, San Jose, California, United States
	3	D.P. Lapotin and S.W. Director. A new algorithm for floorplan design. Proceedings IEEE International Conference on Computer-Aided Design, pages 143-145, 1985.
	4	Hiroshi Murata , Ernest S. Kuh, Sequence-pair based placement method for hard/soft/pre-placed modules, Proceedings of the 1998 international symposium on Physical design, p.167-172, April 06-08, 1998, Monterey, California, United States [doi>10.1145/274535.274560]
	5	Ralph H.J.M. Otten, Automatic floorplan design, Proceedings of the 19th conference on Design automation, p.261-267, January 1982
	6	R.H.J.M. Otten. Efficient floorplan optimization. IEEE International Conference on Computer Design, pages 499-502, 1983.
	7	Shigetoshi Nakatake , Kunihiro Fujiyoshi , Hiroshi Murata , Yoji Kajitani, Module placement on BSG-structure and IC layout applications, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.484-491, November 10-14, 1996, San Jose, California, United States
	8	Larry Stockmeyer, Optimal orientations of cells in slicing floorplan designs, Information and Control, v.57 n.2-3, p.91-101, May/June 1983 [doi>10.1016/S0019-9958(83)80038-2]
	9	Takayuki Yamanouchi , Kazuo Tamakashi , Takashi Kambe, Hybrid floorplanning based on partial clustering and module restructuring, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.478-483, November 10-14, 1996, San Jose, California, United States
	10	D. F. Wong , C. L. Liu, A new algorithm for floorplan design, Proceedings of the 23rd ACM/IEEE conference on Design automation, p.101-107, July 1986, Las Vegas, Nevada, United States
	11	F. Y. Young , D. F. Wong, How good are slicing floorplans?, Proceedings of the 1997 international symposium on Physical design, p.144-149, April 14-16, 1997, Napa Valley, California, United States [doi>10.1145/267665.267705]

CITED BY 11

	Jianbang Lai , Ming-Shiun Lin , Ting-Chi Wang , Li-C. Wang, Module placement with boundary constraints using the sequence-pair representation, Proceedings of the 2001 conference on Asia South Pacific design automation, p.515-520, January 2001, Yokohama, Japan
	M. Lai , D. Wong, Slicing tree is a complete floorplan representation, Proceedings of the conference on Design, automation and test in Europe, p.228-232, March 2001, Munich, Germany
	En-Cheng Liu , Ming-Shiun Lin , Jianbang Lai , Ting-Chi Wang, Slicing floorplan design with boundary-constrained modules, Proceedings of the 2001 international symposium on Physical design, p.124-129, April 01-04, 2001, Sonoma, California, United States
	Yuchun Ma , Sheqin Dong , Xianiong Hong , Yici Cai , Chung-Kuan Cheng , Jun Gu, VLSI floorplanning with boundary constraints based on corner block list, Proceedings of the 2001 conference on Asia South Pacific design automation, p.509-514, January 2001, Yokohama, Japan
	Evangeline F. Y. Young , Chris C. N. Chu , M. L. Ho, Placement constraints in floorplan design, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.7, p.735-745, July 2004
	F. Y. Young , D. F. Wong, Slicing floorplans with range constraint, Proceedings of the 1999 international symposium on Physical design, p.97-102, April 12-14, 1999, Monterey, California, United States
	I-Min Liu , Hung-Ming Chen , Tan-Li Chou , Adnan Aziz , D. F. Wong, Integrated power supply planning and floorplanning, Proceedings of the 2001 conference on Asia South Pacific design automation, p.589-594, January 2001, Yokohama, Japan
	Peter G. Sassone , Sung K. Lim, A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.74, November 09-13, 2003
	Evangeline F. Y. Young , M. L. Ho , Chris C. N. Chu, A Unified Method to Handle Different Kinds of Placement Constraints in Floorplan Design, Proceedings of the 2002 conference on Asia South Pacific design automation/VLSI Design, p.661, January 07-11, 2002
	Sheng-Ta Hsieh , Tsung-Ying Sun , Chan-Cheng Liu , Cheng-Wei Lin, An improved particle swarm optimizer for placement constraints, Journal of Artificial Evolution and Applications, v.8 n.2, p.1-10, January 2008
	Jill H. Y. Law , Evangeline F. Y. Young, Multi-bend bus driven floorplanning, Integration, the VLSI Journal, v.41 n.2, p.306-316, February, 2008